Method for forming silicon nitride film with double stress layers

Abstract

The invention discloses a method for forming a silicon nitride film with double stress layers. In the process of forming the silicon nitride film with double stress layers, N / P MOS (Metal-Oxide-Semiconductor) needs to be selectively etched, so a silicon oxide buffer layer with certain thickness needs to be respectively deposited before the silicon nitride film is deposited; and although the silicon oxide buffer layer is thinner, and the stress of the buffer layer is lower, the silicon oxide buffer layer still has certain influence on the operation speed of a device as the silicon oxide buffer layer is closest to a grid electrode. According to the method, the deposition of the silicon nitride layer with high tensile stress is divided into three parts, certain impurities are doped in the deposition process of the first part and the third part, and the silicon nitride layer with the doping layer and high tensile stress can replace the silicon oxide buffer layer, so that extra deposition steps are not needed, the technique is optimized, the cost is reduced, meanwhile, the influence of the silicon oxide buffer layer on the grid electrode in the N MOS zone does not exist, and the performance of the device is improved.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, and in particular to a method for forming a double stress layer silicon nitride film. Background technique [0002] As the characteristic line width of integrated circuits shrinks below 90nm, people gradually introduce high-stress silicon nitride technology to improve the electrical mobility of carriers. By depositing high-tension and high-pressure-stress silicon nitride on the N / PMOS as a contact etch stop layer (Contact Etch Stop Layer, CESL). Especially below the 65nm process, in order to improve the electrical mobility of N / PMOS at the same time, it is sometimes necessary to deposit high-tension and high-voltage stress silicon nitride on different MOS at the same time, and if there is a compressive stress layer film on the NMOS or on the PMOS When there is a tensile stress film, it will have an adverse effect on the electrical mobility of N / PMOS. [0003] Theref...

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Problems solved by technology

Although the film thickness of these two silicon dioxide buffer layers is relatively thin, and the stress is relatively small, but because the two films are closest to the gate, it also has a certain impact on the electrical mobility of N / PMOS.

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