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Scan signal line driver circuit and display apparatus having same

A technology for scanning signal lines and driving circuits, applied in the connection/interface layout of logic circuits, logic circuits, electrical components, etc., to solve problems such as inability to transmit video signals

Inactive Publication Date: 2012-09-12
SHARP KK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The video signal representing the pixel voltage value is transmitted through the source bus, but each source bus cannot transmit multiple lines of video signals representing the pixel voltage value at one time (simultaneously).

Method used

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  • Scan signal line driver circuit and display apparatus having same
  • Scan signal line driver circuit and display apparatus having same
  • Scan signal line driver circuit and display apparatus having same

Examples

Experimental program
Comparison scheme
Effect test

no. 1 approach ＞

[0152]

[0153] Figure 4 It is a block diagram showing the overall configuration of the active matrix liquid crystal display device according to the first embodiment of the present invention. Such as Figure 4 As shown, the liquid crystal display device includes: a power supply 100; a DC / DC converter 110; a display control circuit 200; a source driver (video signal line driving circuit) 300; a gate driver (scanning signal line driving circuit) 400; a drive circuit 500 ; and a display section 600 . In addition, the gate driver 400 is formed on a display panel including the display unit 600 using amorphous silicon, polycrystalline silicon, microcrystalline silicon, oxide semiconductor (for example, IGZO), or the like. That is, in the present embodiment, the gate driver 400 has a monolithic structure.

[0154] The display unit 600 includes: multiple (j) source bus lines (video signal lines) SL1˜SLj; multiple (i) gate bus lines (scanning signal lines) GL1˜Gli; and these sour...

no. 2 approach ＞

[0198]

[0199] Figure 15 It is a block diagram showing a schematic configuration of a shift register in a liquid crystal display device according to a second embodiment of the present invention. In addition, the overall structure of the liquid crystal display device is the same as that of the above-mentioned first embodiment, so the description thereof will be omitted (see Figure 4 ). In the above-mentioned first embodiment, the gate driver 400 includes two shift registers, but in this embodiment, the gate driver 400 includes three shift registers (the first shift register 421, the second shift register 422 and the third shift register 423). That is, if Figure 15 As shown, the entire shift register 420 for driving the gate bus lines GL1 to GLi in the display unit 600 one by one is realized by the first shift register 421 , the second shift register 422 and the third shift register 423 .

[0200] Same as the first embodiment above, each bistable circuit is provided wi...

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Abstract

This invention is directed to achievement of a gate driver capable of causing a scan signal to fall soon after the termination of a charge time period for each of a plurality of rows. The gate driver comprises two shift registers. An n-th bistable circuit (SR(n)) in the shift registers as a whole (410) outputs, as a scan signal, a status signal (Q) from either one of output nodes (51, 52). A first node (netA), which is connected to the gate terminals of film transistors (T1, T11) used for changing, based on a first clock (CKA), the levels at the output nodes (51, 52), is caused to exhibit an ON-level by inputting, as a set signal (S), a status signal (Q) output from a (n - 2)-th bistable circuit (SR(n - 2)). The output nodes (51, 52) are caused to exhibit an OFF-level by inputting, as a first reset signal (R1), a status signal (Q) output from a (n + 2)-th bistable circuit (SR(n + 2)). The first node (netA) is caused to exhibit the OFF-level by inputting, as a second reset signal (R2), a status signal (Q) output from a (n + 3)-th bistable circuit (SR(n + 3)).

Description

technical field [0001] The present invention relates to a display device and its driving circuit, and more specifically, to a scanning signal line driving circuit including a plurality of shift registers for driving scanning signal lines arranged in a display portion of the display device. Background technique [0002] In recent years, in liquid crystal display devices, singulation of gate drivers (scanning signal line drive circuits) for driving gate bus lines (scanning signal lines) has progressed. Conventionally, gate drivers were often mounted as IC (Integrated Circuit) chips on the periphery of substrates constituting liquid crystal panels. However, in recent years, gate drivers have been increasingly formed directly on substrates. Such a gate driver is called a "monolithic gate driver" or the like. In liquid crystal display devices equipped with monolithic gate drivers, amorphous silicon (a-Si) thin-film transistors (hereinafter referred to as "a-SiTFT") have been use...

Claims

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Application Information

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IPC IPC(8): G09G3/36G02F1/133G09G3/20H03K19/0175
CPCG09G3/3677H03K19/01728H03K19/09441G09G2300/0408G09G2310/0286G11C19/28G09G3/36G02F1/133
Inventor 高桥佳久岩瀬泰章
Owner SHARP KK