Latch-up resisting N-type SOI laterally diffused metal oxide semiconductor

Abstract

A latch-up resisting N-type SOI (Silicon On Insulator) laterally diffused metal oxide semiconductor (LDMOS) comprises an N-type substrate, wherein a buried oxide is arranged on the N-type substrate; an N-type epilayer is arranged on the buried oxide; an N-type buffering well and a P-type body region are arranged in the N-type epilayer; an N-type drain region is arranged in the N-type buffering well; an N-type source region and a P-type body contact region are arranged in the P-type body region; a gate oxide and a field oxide are arranged on the surface of the N-type epilayer; a shallow P-type well region is arranged on the surfaces of both the N-type source region and the P-type body contact region; a polysilicon gate is arranged on the surface of the gate oxide; and a passivation layer is arranged on the surfaces of the field oxide, the P-type body contact region, the N-type source region, the polysilicon gate and the N-type drain region. The latch-up resisting N-type SOI-LDMOS is characterized in that a deep P-type well region sharing the same photoetching board together with the shallow P-type well region and formed by high-energy ion implantation is arranged right below the shallow P-type well region, and the deep P-type well region effectively reduces the conducting resistance of the body region and lowers the latch-up risk in the working process while improving the current capacity of devices.

Description

technical field [0001] The invention mainly relates to the field of high-voltage power semiconductor devices, specifically, an N-type silicon-on-insulator lateral double-diffused field-effect transistor with strong anti-latch capability, which is suitable for plasma flat panel display equipment, half-bridge drive circuits and automobiles. Driver chips in the production field. Background technique [0002] With the development of high-voltage integrated circuits more and more rapidly, the process technology is also constantly improving. In this situation, Silicon On Insulator (SOI) process technology has come out, and its unique insulating buried layer connects the device and the substrate. Complete isolation reduces the parasitic effect of silicon devices to a great extent and greatly improves the performance of devices and circuits. Silicon-on-insulator lateral double-diffused field-effect transistor (SOI-LDMOS) is a typical device based on SOI technology. It has the advan...

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Problems solved by technology

There are many similar methods, and they also have shortcomings under the condition of improving the latch-up problem, such as the decrease of current capability, the significant increase of the device area, and the increase of the complexity of the process version, etc.

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