Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Internet security and acceleration (ISA) interface internet protocol (IP) core based on processor local bus (PLB)

A bus and interface technology, applied in the field of ISA interface IP core, can solve the problems of low speed, reusable and upgradeable complex logic control, difficult implementation, etc., achieve low power consumption, free expansion of modules, and reduce operating burden Effect

Active Publication Date: 2015-03-11
SHENZHEN PUZHILIANKE ROBOT TECH CO LTD
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the microcontroller (MCU) module is usually used as the interface board, namely: PC104 + microcontroller + motor (or sensor) control mode, the problems of this control mode are: 1. The programming language of MCU is mainly C language , implemented with soft logic, which realizes specific functions by sequentially executing instructions, which cannot avoid the disadvantage of low speed; 2. The fact that MCU can only process one instruction at the same time also affects its application, and it can only be used for some algorithms design and simple controls
To sum up, it is very difficult to implement the control method of PC104+microcontroller+motor (or sensor) in terms of complex logic control, parallel high speed, interface board reusability and upgradeability

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Internet security and acceleration (ISA) interface internet protocol (IP) core based on processor local bus (PLB)
  • Internet security and acceleration (ISA) interface internet protocol (IP) core based on processor local bus (PLB)
  • Internet security and acceleration (ISA) interface internet protocol (IP) core based on processor local bus (PLB)

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0024] Embodiments of the present invention are described in further detail below in conjunction with the accompanying drawings:

[0025] A kind of ISA interface IP core based on PLB bus, such as figure 1 As shown in the figure, it includes a decoder, a dual-port RAM, a register array, a read-write state machine, a logic judgment module and a user logic module; the decoder is connected to the user logic module through a control line, and the decoder is connected to the dual port through an address line. The RAM is connected with the register array; one end of the user logic module is connected with the PLB bus, and the other end of the user logic module is connected with the dual-port RAM and the register array respectively through the bidirectional data line; the input end of the read-write state machine is connected with the ISA bus. IO read and write signal (IOR, IOW signal), DMA control signal (AEN signal), clock signal (CLK signal) are connected, and the control signal (W...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to an internet security and acceleration (ISA) interface internet protocol (IP) core based on a processor local bus (PLB), and the ISA interface IP core is characterized by comprising a decoder, a double-port random access memory (RAM), a register array, a read-write state machine and a user logic module; the decoder is connected with the user logic module through a control wire, and the decoder is connected with the double-port RAM and the register array through an address line; the input end of the read-write state machine is connected with an ISA bus, and the output end of the read-write state machine is connected with the double-port RAM; one end of the register array is connected with the ISA bus, the other end of the double-port RAM and the other end of the register array are respectively connected with the user logic module through a two-directional data line, the other end of the user logic module is connected with the PLB, the ISA bus is connected with a principal computer control unit, and the PLB bus is connected with a central processing unit (CPU). The ISA bus is connected with the principal computer control unit, and the PLB bus is connected with the CPU, so that a data interaction function is realized, and the ISA interface IP core has characteristics of simpleness in control logic, high reliability, rapid speed, strong compatibility, easiness in expansion and the like.

Description

technical field [0001] The invention belongs to the field of mobile robots, in particular to an ISA interface IP core based on a PLB bus. Background technique [0002] In the field of mobile robots, PC104 is usually used to control motors or sensors. Due to the design characteristics of PC104 itself, it cannot directly control the motor. Therefore, the information exchange between PC104 and the motor requires an intermediate link, which is the interface board. At present, the microcontroller (MCU) module is usually used as the interface board, that is, the control method of PC104+microcontroller+motor (or sensor), the problems of this control method are: 1. The programming language of MCU is mainly C language , implemented by soft logic, it implements specific functions by sequentially executing instructions, which cannot avoid the disadvantage of low speed; 2. The feature that MCU can only process one instruction at a time also affects its application, and it can only be u...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/40
Inventor 赵哲
Owner SHENZHEN PUZHILIANKE ROBOT TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com