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Multi-chip reversely-arranged etched-encapsulated base island-exposed encapsulating structure and manufacturing method thereof

A technology of packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve problems such as great differences in material characteristics, stress deformation, and reliability levels that affect reliability and safety capabilities. Achieve the effects of not being easy to stress and deform, reducing environmental pollution, and improving safety

Active Publication Date: 2013-01-09
JCET GROUP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0020] 3. Glass fiber itself is a kind of foaming material, so it is easy to absorb moisture and humidity due to the storage time and environment, which directly affects the safety capability or reliability level of reliability;
[0021] 4. The surface of the glass fiber is covered with a copper foil metal layer thickness of about 50-100 μm, and the etching distance between the metal layer line and the line can only achieve an etching gap of 50-100 μm due to the characteristics of the etching factor (see Figure 40 , the best production capacity is that the etching gap is approximately equal to the thickness of the etched object), so it is impossible to truly design and manufacture high-density circuits;
[0023] 6. Also because the entire substrate material is made of glass fiber material, the thickness of the glass fiber layer is obviously increased by 100~150 μm, and it is impossible to achieve ultra-thin packaging;
[0024] 7. Due to the large difference in material properties (expansion coefficient), the traditional glass fiber plus copper foil technology is easy to cause stress deformation in the harsh environment process, which directly affects the accuracy of component loading and the adhesion and reliability of components and substrates. sex

Method used

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  • Multi-chip reversely-arranged etched-encapsulated base island-exposed encapsulating structure and manufacturing method thereof
  • Multi-chip reversely-arranged etched-encapsulated base island-exposed encapsulating structure and manufacturing method thereof
  • Multi-chip reversely-arranged etched-encapsulated base island-exposed encapsulating structure and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0113] Example 1: Single base island single turn pin

[0114] Referring to FIG. 20(A) and FIG. 20(B), FIG. 20(A) is a schematic structural diagram of Embodiment 1 of the multi-chip flip chip of the present invention, which is etched first and then packaged to expose the package base island. FIG. 20(B) is a top view of FIG. 20(A). It can be seen from Fig. 20(A) and Fig. 20(B) that the multi-chip flip chip of the present invention is first etched and then packaged to expose the packaging structure of the base island, which includes a base island 1, pins 2 and chip 3, and the chip 3 has a plurality of, the plurality of chips 3 are flip-chip on the base island 1 and the front of the pin 2, and an underfill glue 14 is arranged between the bottom of the chip 3 and the front of the base island 1 and the pin 2, and the periphery of the base island 1 The area between base island 1 and pin 2, the area between pin 2 and pin 2, the area above base island 1 and pin 2, the area below base ...

Embodiment 2

[0158] Example 2: Single base island single turn pin passive device

[0159] Referring to FIG. 21(A) and FIG. 21(B), FIG. 21(A) is a schematic structural diagram of embodiment 2 of the multi-chip flip chip of the present invention, which is etched first and then packaged to expose the package structure. FIG. 21(B) is a top view of FIG. 21(A). It can be seen from Fig. 21(A) and Fig. 21(B) that the difference between embodiment 2 and embodiment 1 is that the passive bonding material is used to bridge the pin 2 and pin 2 The device 8, the passive device 8 may be connected between the front of the pin 2 and the front of the pin 2, or may be connected between the back of the pin 2 and the back of the pin 2.

Embodiment 3

[0160] Example 3: Single base island multi-turn pin

[0161] Referring to FIG. 22(A) and FIG. 22(B), FIG. 22(A) is a schematic structural diagram of Embodiment 3 of the multi-chip flip chip of the present invention, which is etched first and then packaged to expose the package base island. Fig. 22(B) is a top view of Fig. 22(A). It can be seen from FIG. 22(A) and FIG. 22(B) that the only difference between embodiment 3 and embodiment 1 is that the pin 2 has multiple turns.

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Abstract

The invention relates to a multi-chip reversely-arranged etched-encapsulated base island-exposed encapsulating structure and a manufacturing method thereof. The structure comprises a base island (1), a pin (2) and a plurality of chips (3), wherein the chips (3) are reversely arranged on the front faces of the base island (1) and the pin (2); bottom filling adhesives (14) are arranged between the bottoms of the chips (3) and the front faces of the base island (1) and the pin (2); plastic sealing materials (4) are enveloped in a region on the periphery of the base island (1), a region between the base island (1) and the pin (2) and a region between adjacent pins (2) and outside the chips (3); the surfaces of the plastic sealing materials (4) on the lower parts of the base island (1) and the pin (2) are provided with small holes (5); and metal balls (7) are arranged in the small holes (5). The multi-chip reversely-arranged etched-encapsulated base island exposing encapsulating structure has the beneficial effects that the manufacturing cost is lowered, the safety and the reliability of an encapsulating body are enhanced, environmental pollution is lowered, and design and manufacturing of a high-density circuit are realized truly.

Description

[0001] technical field [0002] The invention relates to a multi-chip flip chip packaging structure exposed by etching first and then packaging base islands and a manufacturing method thereof, belonging to the technical field of semiconductor packaging. Background technique [0003] The manufacturing process flow of the traditional high-density substrate package structure is as follows: [0004] Step 1, see Figure 28 , take a substrate made of glass fiber material, [0005] Step two, see Figure 29 , opening holes at desired locations on the fiberglass substrate, [0006] Step three, see Figure 30 , coated with a layer of copper foil on the back of the glass fiber substrate, [0007] Step 4, see Figure 31 , fill the conductive material in the position where the glass fiber substrate is punched, [0008] Step five, see Figure 32 , coated with a layer of copper foil on the front of the glass fiber substrate, [0009] Step six, see Figure 33 , coated with a photor...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/495H01L23/31H01L21/50
CPCH01L24/97H01L2224/73204H01L2924/01322
Inventor 王新潮李维平梁志忠
Owner JCET GROUP CO LTD
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