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58results about How to "The technical ability to achieve tiling" patented technology

Flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and packaging structure of flip-chip single-face three-dimensional circuit

ActiveCN102723280ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityElectroplating
The invention relates to a flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and a packaging structure of a flip-chip single-face three-dimensional circuit. The method includes following steps: picking a metal substrate, pre-coppering the surface of the metal substrate, sticking photo-resistant films, removing part of the photo-resistant films on the back of the metal substrate, electroplating an inert metal circuit layer, electroplating a metal circuit layer, removing the photo-resistant films, packaging, processing a hole on the surface of plastic-packaged materials, grooving, electroplating conductive metal, pretreating before metallization, electroplating a metal circuit layer, chemically etching, electroplating a metal circuit layer, mounting a chip and filling at the bottom of the chip, cleaning, balling and cutting to obtain a finished product. The flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and the packaging structure of the flip-chip single-face three-dimensional circuit have the advantages that fabrication cost is lowered, safety and reliability of a packaged body is improved, environmental pollution is reduced, and design and fabrication of high-density circuits can be truly realized.
Flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and packaging structure of flip-chip single-face three-dimensional circuit
Flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and packaging structure of flip-chip single-face three-dimensional circuit
Flip-chip single-face three-dimensional circuit fabrication method by etching-first and packaging-second and packaging structure of flip-chip single-face three-dimensional circuit
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Owner:JCET GROUP CO LTD

Etching-first and packaging-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit

ActiveCN102723282ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesEtchingMetal substrate
The invention relates to an etching-first and packaging-later manufacturing method for a chip formal double-surface three-dimensional circuit and a packaging structure of the chip formal double-surface three-dimensional circuit. The method comprises the following steps of taking a metal substrate; pre-plating copper on the surface of the metal substrate; coating the surface of the metal substrate with green paint; removing a part of the green paint from the back surface of the metal substrate; electro-plating an inert metal circuit layer; electro-plating a metal circuit layer; coating the back surface of the metal substrate with the green paint; removing a part of the green paint from the back surface of the metal substrate; electro-plating the metal circuit layer; coating the back surface of the metal substrate with the green paint; removing a part of the green paint from the back surface of the metal substrate; coating a circuit screen board; pre-processing of metallization; removing the circuit screen board; electro-plating the metal circuit layer; coating the back surface of the metal substrate with the green paint; removing a part of the green paint from the front surface of the metal substrate; chemical-etching; electro-plating the metal circuit layer; coating bonding materials; installing a chip; bonding with metal wires; packaging; tapping at the back surface of the metal substrate; cleaning; implanting a metal ball; and cutting a finished product. The method disclosed by the invention has the beneficial effects that the manufacturing cost is lowered, the safety and the reliability of a packaging body are increased, the environment pollution is reduced, and the design and the manufacturing of a high-density circuit can be really realized.
Etching-first and packaging-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit
Etching-first and packaging-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit
Etching-first and packaging-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit
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Owner:JCET GROUP CO LTD

Normal chip single-faced three-dimensional circuit manufacture method by encapsulation prior to etching and normal chip single-faced three-dimensional circuit encapsulation structure

ActiveCN102723289ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesEtchingHigh density
The invention relates to a normal chip single-faced three-dimensional circuit manufacture method by encapsulation prior to etching. The method includes: taking a metal substrate; preplating copper to the metal substrate surface; coating with green paint; partially removing the green paint on the front of the metal substrate; electroplating inert a metal circuit layer; electroplating a metal circuit layer; coating with green paint; partially removing the green paint on the front of the metal substrate; electroplating a metal circuit layer; coating with green paint; partially removing the green paint on the front of the metal substrate; coating a circuit screen plate; performing metallization pretreatment; removing the circuit screen plate; electroplating metal circuit layer; coating bonding material; mounting a chip; performing metal circuit bonding; encapsulating; partially removing the green paint on the back of the metal substrate; performing chemical etching; electroplating a metal circuit layer; coating with green paint; reserving holes on the green paint; cleaning; attaching balls; and cutting finished products. The normal chip single-faced three-dimensional circuit manufacture method by encapsulation prior to etching has the advantages that manufacture cost is lowered, safety and reliability of encapsulation are enhanced, environmental pollution is reduced, and design and manufacture of high density circuit are really achieved.
Normal chip single-faced three-dimensional circuit manufacture method by encapsulation prior to etching and normal chip single-faced three-dimensional circuit encapsulation structure
Normal chip single-faced three-dimensional circuit manufacture method by encapsulation prior to etching and normal chip single-faced three-dimensional circuit encapsulation structure
Normal chip single-faced three-dimensional circuit manufacture method by encapsulation prior to etching and normal chip single-faced three-dimensional circuit encapsulation structure
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Owner:JCET GROUP CO LTD

First packaged and then etched packaging structure with single chip normally installed and base islands buried and preparation method of structure

ActiveCN102856283ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesSmall holeElectrical and Electronics engineering
The invention relates to a first packaged and then etched packaging structure with a single chip normally installed and base islands buried and a preparation method of the structure. The structure comprises base islands (1) and pins (2), wherein a chip (4) is arranged on the fronts of the base islands (1); the front face of the chip (4) and the front faces of the pins (2) are connected by metal wires (5); plastic package materials (6) are arranged in the surrounding regions of the base islands (1) and the pins (2) and outside the chip (4) and the metal wires (5); small holes (7) are formed on the surfaces of the plastic package materials (6) on the lower parts of the pins (2); the small holes (7) are communicated with the backs of the pins (2); metal balls (9) are arranged in the small holes (7); and the metal balls (9) are contacted with the backs of the pins (2). The packaging structure and the preparation method have the following beneficial effects that the preparation cost is reduced; the safety and reliability of the packaging body are improved; environmental pollution is reduced; and design and preparation of high-density circuits are truly achieved.
First packaged and then etched packaging structure with single chip normally installed and base islands buried and preparation method of structure
First packaged and then etched packaging structure with single chip normally installed and base islands buried and preparation method of structure
First packaged and then etched packaging structure with single chip normally installed and base islands buried and preparation method of structure
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Owner:JCET GROUP CO LTD

First etched and then packaged packaging structure with single chip reversedly installed and base islands buried as well as preparation method thereof

ActiveCN102856290ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densitySingle chip
The invention relates to a first etched and then packaged packaging structure with a single chip reversedly installed and base islands buried as well as a preparation method thereof. The packaging structure comprises base islands (1), pins (2) and a chip (3), wherein the chip is reversedly installed on the fronts of the base islands and the fronts of the pins; underfills (14) are arranged between the bottom of the chip and the fronts of the base islands and the pins; plastic package materials (4) are arranged in the peripheral regions of the base islands, the regions between the base islands and the pins, the regions between the pins, the regions on the upper parts of the base islands and the pins and the regions on the lower parts of the base islands and the pins and on the periphery of the chip; small holes (5) are arranged on the plastic package materials on the backs of the pins and are communicated with the backs of the pins; and metal balls (7) are arranged in the small holes and are contacted with the backs of the pins. The packaging structure and the preparation method have the following beneficial effects that the preparation cost is reduced; the safety and reliability of the packaging body are improved; environmental pollution is reduced; and design and preparation of high-density circuits are truly achieved.
First etched and then packaged packaging structure with single chip reversedly installed and base islands buried as well as preparation method thereof
First etched and then packaged packaging structure with single chip reversedly installed and base islands buried as well as preparation method thereof
First etched and then packaged packaging structure with single chip reversedly installed and base islands buried as well as preparation method thereof
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Owner:JCET GROUP CO LTD

Multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof

ActiveCN102856287ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityBiomedical engineering
The invention relates to a multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and a manufacturing method thereof. The structure comprises pads (1) and pins (2). A plurality of chips (4) are arranged on the right sides of the pads (1), and the right sides of the chips (4) and the pins (2) are connected through metal wires (5). Molding compounds (6) are packaged on the peripheries of the pads (1) and the pins (2) and outside the chips (4) and the metal wires (5). Holes (7) are opened on the surfaces of the molding compounds (6) on the lower portions of the pads (1) and the pins (2). Metal balls (9) are arranged in the holes (7) and contacted with the reverse sides of the pads (1) or the pins (2). The multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and the manufacturing method thereof have the advantages of reducing manufacturing costs, improving safety and reliability of packaging bodies, reducing environmental pollution, and being capable of designing and manufacturing high-density lines.
Multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof
Multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof
Multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof
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Owner:星科金朋半导体(江阴)有限公司

Multi-chip reversely-arranged etched-encapsulated base island-exposed encapsulating structure and manufacturing method thereof

ActiveCN102867802ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityAdhesive
The invention relates to a multi-chip reversely-arranged etched-encapsulated base island-exposed encapsulating structure and a manufacturing method thereof. The structure comprises a base island (1), a pin (2) and a plurality of chips (3), wherein the chips (3) are reversely arranged on the front faces of the base island (1) and the pin (2); bottom filling adhesives (14) are arranged between the bottoms of the chips (3) and the front faces of the base island (1) and the pin (2); plastic sealing materials (4) are enveloped in a region on the periphery of the base island (1), a region between the base island (1) and the pin (2) and a region between adjacent pins (2) and outside the chips (3); the surfaces of the plastic sealing materials (4) on the lower parts of the base island (1) and the pin (2) are provided with small holes (5); and metal balls (7) are arranged in the small holes (5). The multi-chip reversely-arranged etched-encapsulated base island exposing encapsulating structure has the beneficial effects that the manufacturing cost is lowered, the safety and the reliability of an encapsulating body are enhanced, environmental pollution is lowered, and design and manufacturing of a high-density circuit are realized truly.
Multi-chip reversely-arranged etched-encapsulated base island-exposed encapsulating structure and manufacturing method thereof
Multi-chip reversely-arranged etched-encapsulated base island-exposed encapsulating structure and manufacturing method thereof
Multi-chip reversely-arranged etched-encapsulated base island-exposed encapsulating structure and manufacturing method thereof
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Owner:JCET GROUP CO LTD

Multi-chip flip, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof

ActiveCN102856284ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityBiomedical engineering
The invention relates to a multi-chip flip, etching-after-packaging and pad exposed packaging structure and a manufacturing method thereof. The structure comprises pads (1), pins (2) and a plurality of chips (3). The plurality of the chips (3) are arranged on the right sides of the pads (1) and the pins (2) in an inverted mode. Bottom filling glue (14) is arranged between the bottoms of the plurality of the chips (3) and the right sides of the pads (1) and the pins (2). Molding compounds (4) are packaged in areas on the peripheries of the pads (1), between the pads (1) and the pins (2), among the pins (2) and outside the plurality of the chips (3). Holes (5) are opened on the surfaces of the molding compounds (4) on the lower portions of pads (1) and the pins (2), and metal balls (7) are arranged in the holes (5). The multi-chip flip, etching-after-packaging and pad exposed packaging structure and the manufacturing method thereof have the advantages of reducing manufacturing costs, improving safety and reliability of packaging bodies, reducing environmental pollution, and being capable of designing and manufacturing high-density lines.
Multi-chip flip, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof
Multi-chip flip, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof
Multi-chip flip, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof
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Owner:JCET GROUP CO LTD

Multi-chip reversely-arranged etched-encapsulated base island-buried encapsulating structure and manufacturing method thereof

ActiveCN102867791ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityAdhesive
The invention relates to a multi-chip reversely-arranged etched-encapsulated base island-buried encapsulating structure and a manufacturing method thereof. The structure comprises a base island (1), a pin (2) and a plurality of chips (3), wherein the chips (3) are reversely arranged on the front faces of the base island and the pin; bottom filling adhesives (14) are arranged between the bottoms of the chips and the front faces of the base island and the pin; plastic sealing materials (4) are enveloped in a region on the periphery of the base island, a region between the base island and the pin, a region between adjacent pins, regions on the upper parts of the base island and the pin, regions on the lower parts of the base island and the pin and the peripheries of the chips; the plastic sealing materials on the back face of the pin are provided with small holes (5); and metal balls (7) are arranged in the small holes (5), and are contacted with the back face of the pins. The multi-chip reversely-arranged etched-encapsulated base island-buried encapsulating structure has the beneficial effects that the manufacturing cost is lowered, the safety and the reliability of an encapsulating body are enhanced, environmental pollution is lowered, and design and manufacturing of a high-density circuit are realized truly.
Multi-chip reversely-arranged etched-encapsulated base island-buried encapsulating structure and manufacturing method thereof
Multi-chip reversely-arranged etched-encapsulated base island-buried encapsulating structure and manufacturing method thereof
Multi-chip reversely-arranged etched-encapsulated base island-buried encapsulating structure and manufacturing method thereof
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Owner:JCET GROUP CO LTD

Single-side three-dimensional circuit chip upside-down-charging packaging-before-etching method and packaging structure thereof

ActiveCN102760668ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesPlastic packagingHigh density
The invention relates to a single-side three-dimensional circuit chip upside-down-charging packaging-before-etching method, which comprises the following process steps: taking a metal baseplate; pre-plating copper on the surface of the metal baseplate; pasting light resistant films; removing part of the light resistant films on the front surface of the metal baseplate; electroplating an inert metal circuit layer; electroplating a metal circuit layer; pasting light resistant films; removing part of the light resistant films on the front surface of the baseplate; electroplating a metal circuit layer; removing the light resistant films on the surface of the metal baseplate; encapsulating; processing before metallization; electroplating a metal circuit layer; removing the light resistant films on the surface of the metal baseplate; mounting a chip and filling the bottom of the chip; encapsulating; chemically etching; removing the light resistant films on the surface of the metal baseplate; electroplating a metal circuit layer; encapsulating; cutting holes in the surface of plastic packaging materials; washing; mounting balls; and cutting finished products. The method and the structure disclosed by the invention has the benefits that the manufacture cost is lowered, the safety and reliability of the packaged body are improved, and the environment pollution is reduced, so that design and manufacture of high-density circuits are realized actually.
Single-side three-dimensional circuit chip upside-down-charging packaging-before-etching method and packaging structure thereof
Single-side three-dimensional circuit chip upside-down-charging packaging-before-etching method and packaging structure thereof
Single-side three-dimensional circuit chip upside-down-charging packaging-before-etching method and packaging structure thereof
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Owner:JCET GROUP CO LTD

Packaging-first and etching-later manufacturing method for chip formal single-surface three-dimensional circuit and packaging structure of chip formal single-surface three-dimensional circuit

ActiveCN102723290ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityEtching
The invention relates to a packaging-first and etching-later manufacturing method for a chip formal single-surface three-dimensional circuit. The method comprises the following technology steps of taking a metal substrate; pre-plating copper material on the surface of the metal substrate; carrying out the operation of pasting a photo-resisting film; removing a part of the photo-resisting film from the front surface of the metal substrate; electro-plating an inert metal circuit layer; electro-plating a metal circuit layer; carrying out the operation of pasting a photo-resisting film; removing a part of the photo-resisting film from the front surface of the metal substrate; electro-plating the metal circuit layer; removing the photo-resisting film on the surface of the metal substrate; packaging; pre-processing of metallization; electro-plating the metal circuit layer; removing the photo-resisting film on the surface of the metal substrate; coating bonding materials; installing a chip; bonding with metal wires; packaging; carrying out the operation of pasting the photo-resisting film; removing a part of the photo-resisting film from the back surface of the metal substrate; chemical-etching; removing the photo-resisting film on the surface of the metal substrate; electro-plating the metal circuit layer; packaging; tapping on the surface of plastic package material; cleaning; implanting a metal ball; and cutting a finished product. The method disclosed by the invention has the beneficial effects that the manufacturing cost is lowered, the safety and the reliability of a packaging body are increased, the environment pollution is reduced, and the design and the manufacturing of a high-density circuit can be really realized.
Packaging-first and etching-later manufacturing method for chip formal single-surface three-dimensional circuit and packaging structure of chip formal single-surface three-dimensional circuit
Packaging-first and etching-later manufacturing method for chip formal single-surface three-dimensional circuit and packaging structure of chip formal single-surface three-dimensional circuit
Packaging-first and etching-later manufacturing method for chip formal single-surface three-dimensional circuit and packaging structure of chip formal single-surface three-dimensional circuit
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Owner:JCET GROUP CO LTD

Single-chip flip, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof

ActiveCN102856269ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesBiomedical engineeringHigh density
The invention relates to a single-chip flip, etching-after-packaging and pad exposed packaging structure and a manufacturing method thereof. The structure comprises pads (1), pins (2) and a chip (3). The chip (3) is arranged on the right sides of the pads (1) and the pins (2) in an inverted mode. Bottom filling glue (14) is arranged between the bottom of the chip (3) and the right sides of the pads (1) and the pins (2). Molding compounds (4) are packaged in areas on the peripheries of the pads (1), between the pads (1) and the pins (2), among the pins (2) and outside the chip (3). Holes (5) are opened on the surfaces of the molding compounds (4) on lower portions of the pads (1) and the pins (2), and metal balls (7) are arranged in the holes (5). The single-chip flip, etching-after-packaging and pad exposed packaging structure and the manufacturing method thereof have the advantages of reducing manufacturing costs, improving safety and reliability of packaging bodies, reducing environmental pollution, and being capable of designing and manufacturing high-density lines.
Single-chip flip, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof
Single-chip flip, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof
Single-chip flip, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof
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Owner:JCET GROUP CO LTD

Multi-chip flip-chip etching first packaging structure without base island and its manufacturing method

ActiveCN102856271BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityBiochemical engineering
The invention relates to a multi-chip flip, packaging-after-etching and non-pad packaging structure and a manufacturing method thereof. The structure comprises pins (1) and a plurality of chips (2). The plurality of the chips (2) are arranged on the right sides of the pins (1) in an inverted mode; bottom filling glue (13) is arranged between the bottoms of the chips (2) and the right sides of the pins (1); molding compounds (3) are packaged in areas on the peripheries of the pins (1), among the pins (1), on the upper portions and the lower portions of the pins (1) and outside the chips (2); holes (4) are opened on the surfaces of the molding compounds (3) on the lower portions of the pins (1), and communicated with the reverse sides of the pins (1); and metal balls (6) are arranged in the holes (4) and contacted with the reverse sides of the pins (1). The multi-chip flip, packaging-after-etching and non-pad packaging structure and the manufacturing method thereof have the advantages of reducing manufacturing costs, improving safety and reliability of packaging bodies, and being capable of designing and manufacturing high-density lines.
Multi-chip flip-chip etching first packaging structure without base island and its manufacturing method
Multi-chip flip-chip etching first packaging structure without base island and its manufacturing method
Multi-chip flip-chip etching first packaging structure without base island and its manufacturing method
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Owner:JCET GROUP CO LTD

First etched and then packaged packaging structure with single chip reversedly installed and base islands buried as well as preparation method thereof

ActiveCN102856290BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densitySingle chip
The invention relates to a first etched and then packaged packaging structure with a single chip reversedly installed and base islands buried as well as a preparation method thereof. The packaging structure comprises base islands (1), pins (2) and a chip (3), wherein the chip is reversedly installed on the fronts of the base islands and the fronts of the pins; underfills (14) are arranged between the bottom of the chip and the fronts of the base islands and the pins; plastic package materials (4) are arranged in the peripheral regions of the base islands, the regions between the base islands and the pins, the regions between the pins, the regions on the upper parts of the base islands and the pins and the regions on the lower parts of the base islands and the pins and on the periphery of the chip; small holes (5) are arranged on the plastic package materials on the backs of the pins and are communicated with the backs of the pins; and metal balls (7) are arranged in the small holes and are contacted with the backs of the pins. The packaging structure and the preparation method have the following beneficial effects that the preparation cost is reduced; the safety and reliability of the packaging body are improved; environmental pollution is reduced; and design and preparation of high-density circuits are truly achieved.
First etched and then packaged packaging structure with single chip reversedly installed and base islands buried as well as preparation method thereof
First etched and then packaged packaging structure with single chip reversedly installed and base islands buried as well as preparation method thereof
First etched and then packaged packaging structure with single chip reversedly installed and base islands buried as well as preparation method thereof
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Owner:JCET GROUP CO LTD

Single-chip horizontal packaging, packaging-after-etching and pad-embedded packaging structure and manufacturing method thereof

ActiveCN102856294BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityEngineering
The invention relates to a single-chip horizontal packaging, packaging-after-etching and pad-embedded packaging structure and a manufacturing method thereof. The structure comprises pads (1) and pins (2). A chip (4) is arranged on the right sides of the pads (1), and the right side of the chip (4) and the right sides of the pins (2) are connected through metal wires (5). Molding compounds (6) are packaged on the peripheries of the pads (1) and the pins (2) and outside the chip (4) and the metal wires (5). Holes (7) are opened on surfaces of the molding compounds (6) on the lower portions of the pins (2) and communicated with the reverse sides of the pins (2). Metal balls (9) are arranged in the holes (7) and contacted with the reverse sides of the pins (2). The single-chip horizontal packaging, packaging-after-etching and pad-embedded packaging structure and the manufacturing method thereof have the advantages of reducing manufacturing costs, improving safety and reliability of packaging bodies, reducing environmental pollution, and being capable of designing and manufacturing high-density lines.
Single-chip horizontal packaging, packaging-after-etching and pad-embedded packaging structure and manufacturing method thereof
Single-chip horizontal packaging, packaging-after-etching and pad-embedded packaging structure and manufacturing method thereof
Single-chip horizontal packaging, packaging-after-etching and pad-embedded packaging structure and manufacturing method thereof
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Owner:JCET GROUP CO LTD

Single-chip flip-chip first encapsulation and then etching base island embedded encapsulation structure and manufacturing method thereof

ActiveCN102856285BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesSpin-flipHigh density
The invention relates to a single-chip flip, etching-after-packaging and pad embedded packaging structure and a manufacturing method thereof. The structure comprises pads (1), pins (2) and a chip (3). The chip is arranged on the right sides of the pads and the pins in an inverted mode; bottom filling glue (14) is arranged between the bottom of the chip and the right sides of the pads and the pins; molding compounds (4) are packaged in areas on the peripheries of the pads, between the pads and the pins, among the pins, on the upper portions of the pads and the pins, on the lower portions of the pads and the pins and on the periphery of the chip; holes (5) are opened on the molding compounds on the reverse sides of the pins, and communicated with the reverse sides of the pins; and metal balls (7) are arranged in the holes and contacted with the reverse sides of the pins. The single-chip flip, etching-after-packaging and pad embedded packaging structure and the manufacturing method thereof have the advantages of reducing manufacturing costs, improving safety and reliability of packaging bodies, reducing environmental pollution, and being capable of designing and manufacturing high-density lines.
Single-chip flip-chip first encapsulation and then etching base island embedded encapsulation structure and manufacturing method thereof
Single-chip flip-chip first encapsulation and then etching base island embedded encapsulation structure and manufacturing method thereof
Single-chip flip-chip first encapsulation and then etching base island embedded encapsulation structure and manufacturing method thereof
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Owner:JCET GROUP CO LTD

Packaging-first and etching-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit

ActiveCN102723286BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityEtching
The invention relates to a packaging-first and etching-later manufacturing method for a chip formal double-surface three-dimensional circuit and a packaging structure of the chip formal double-surface three-dimensional circuit. The method comprises the following technology steps of taking a metal substrate; pre-plating copper on the surface of the metal substrate; coating the surface of the metal substrate with green paint; removing a part of the green paint from the front surface of the metal substrate; electro-plating an inert metal circuit layer; electro-plating a metal circuit layer; coating the front surface of the metal substrate with the green paint; removing a part of the green paint from the front surface of the metal substrate; electro-plating the metal circuit layer; coating the front surface of the metal substrate with the green paint; removing a part of the green paint from the front surface of the metal substrate; coating a circuit screen board; pre-processing of metallization; removing the circuit screen board; electro-plating the metal circuit layer; coating bonding materials; installing a chip; bonding with metal wires; packaging; removing a part of the green paint from the back surface of the metal substrate; chemical-etching; electro-plating the metal circuit layer; electro-plating the metal circuit layer; coating the back surface of the metal substrate with the green paint; tapping on surface of the green paint; cleaning; implanting a metal ball; and cutting a finished product. The method disclosed by the invention has the beneficial effects that the manufacturing cost is lowered, the safety and the reliability of a packaging body are increased, the environment pollution is reduced, and the design and the manufacturing of a high-density circuit can be really realized.
Packaging-first and etching-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit
Packaging-first and etching-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit
Packaging-first and etching-later manufacturing method for chip formal double-surface three-dimensional circuit and packaging structure of chip formal double-surface three-dimensional circuit
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Owner:JCET GROUP CO LTD

Method for manufacturing front-mounted three-dimensional line on single side of chip by using first etching and later packaging and packaging structure of three-dimensional line

ActiveCN102723284BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityEtching
The invention relates to a method for manufacturing a front-mounted three-dimensional line on single side of a chip by using first-etching later-packaging and a packaging structure of the three-dimensional line. The method comprises the following steps of: taking a metal substrate; pre-plating copper on the surface of the metal substrate; coating green paint; removing a part of green paint on the back side of the substrate; electro-plating an inert metal line layer; electro-plating a metal line layer; coating the grain paint; removing a part of green paint on the back side of a substrate; electro-plating the metal line layer; coating the green paint; removing a part of the green paint on the back side of the substrate; coating a line screen plate; pre-treating metallization; removing the line screen plate; electro-plating the metal line layer; coating the green paint; removing a part of green paint on the front side of the substrate; performing chemical etching; electro-plating the metal line layer; coating a bonding material; mounting the chip; bonding a metal line; encapsulating; arranging holes on the back side of the substrate; cleaning; reballing; and cutting to obtain a finished product. The method has the beneficial effects that the manufacturing cost is reduced, the security and the reliability of a packaging body are improved, and the environmental pollution is reduced, so that the design and the manufacture of high-density lines can be really realized.
Method for manufacturing front-mounted three-dimensional line on single side of chip by using first etching and later packaging and packaging structure of three-dimensional line
Method for manufacturing front-mounted three-dimensional line on single side of chip by using first etching and later packaging and packaging structure of three-dimensional line
Method for manufacturing front-mounted three-dimensional line on single side of chip by using first etching and later packaging and packaging structure of three-dimensional line
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Owner:JCET GROUP CO LTD

Multi-chip positive packaging structure for embedding basic island by first packaging and second etching, and manufacturing method for multi-chip positive packaging structure

ActiveCN102881670ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesEtchingHigh density
The invention relates to a multi-chip positive packaging structure for embedding a basic island by first packaging and second etching, and a manufacturing method for the multi-chip positive packaging structure. The multi-chip positive packaging structure comprises the basic island (1) and pins (2), wherein chips (4) are arranged on the front face of the basic island (1); the front faces of the chips (4) are connected with the front faces of the pins (2) through metal wires (5); plastic materials (6) wrap the surrounding regions of the basic island (1) and the pins (2) as well as the chips (4) and the metal wires (5); small holes (7) are formed in the surfaces of the plastic materials (6) on the lower parts of the pins (2) and are communicated with the back faces of the pins (2); and metal balls (9) are arranged in the small holes (7) and are in contact with the back faces of the pins (2). The multi-chip positive packaging structure has the advantages that the manufacturing cost is reduced, the safety and the reliability of a package body are improved, the environment pollution is reduced, and design and manufacturing of a high-density line can be really realized.
Multi-chip positive packaging structure for embedding basic island by first packaging and second etching, and manufacturing method for multi-chip positive packaging structure
Multi-chip positive packaging structure for embedding basic island by first packaging and second etching, and manufacturing method for multi-chip positive packaging structure
Multi-chip positive packaging structure for embedding basic island by first packaging and second etching, and manufacturing method for multi-chip positive packaging structure
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Owner:JCET GROUP CO LTD

Single-chip front-mount etch-before-package substrate-free packaging structure and manufacturing method thereof

ActiveCN102856293BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densitySingle chip
The invention relates to a first etched and then packaged packaging structure with a single chip normally installed and base islands buried as well as a preparation method thereof. The structure comprises base islands (1) and pins (2), wherein a chip (4) is arranged on the fronts of the base islands (1); the front of the chip (4) and the fronts of the pins (2) are connected by metal wires (5); plastic package materials (6) are arranged in the surrounding regions of the base islands (1) and the pins (2) and outside the chip (4) and the metal wires (5); small holes (7) are arranged on the surfaces of the plastic package materials (6) on the lower parts of the pins (2); the small holes (7) are communicated with the backs of the pins (2); metal balls (9) are arranged in the small holes (7); and the metal balls (9) are contacted with the backs of the pins (2). The packaging structure and the preparation method have the following beneficial effects that the preparation cost is reduced; the safety and reliability of the packaging body are improved; environmental pollution is reduced; and design and preparation of high-density circuits are truly achieved.
Single-chip front-mount etch-before-package substrate-free packaging structure and manufacturing method thereof
Single-chip front-mount etch-before-package substrate-free packaging structure and manufacturing method thereof
Single-chip front-mount etch-before-package substrate-free packaging structure and manufacturing method thereof
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Owner:JCET GROUP CO LTD

Multi-chip flip-chip packaging first, then etching base island to expose packaging structure and manufacturing method thereof

ActiveCN102856284BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityBiochemical engineering
The invention relates to a multi-chip flip, etching-after-packaging and pad exposed packaging structure and a manufacturing method thereof. The structure comprises pads (1), pins (2) and a plurality of chips (3). The plurality of the chips (3) are arranged on the right sides of the pads (1) and the pins (2) in an inverted mode. Bottom filling glue (14) is arranged between the bottoms of the plurality of the chips (3) and the right sides of the pads (1) and the pins (2). Molding compounds (4) are packaged in areas on the peripheries of the pads (1), between the pads (1) and the pins (2), among the pins (2) and outside the plurality of the chips (3). Holes (5) are opened on the surfaces of the molding compounds (4) on the lower portions of pads (1) and the pins (2), and metal balls (7) are arranged in the holes (5). The multi-chip flip, etching-after-packaging and pad exposed packaging structure and the manufacturing method thereof have the advantages of reducing manufacturing costs, improving safety and reliability of packaging bodies, reducing environmental pollution, and being capable of designing and manufacturing high-density lines.
Multi-chip flip-chip packaging first, then etching base island to expose packaging structure and manufacturing method thereof
Multi-chip flip-chip packaging first, then etching base island to expose packaging structure and manufacturing method thereof
Multi-chip flip-chip packaging first, then etching base island to expose packaging structure and manufacturing method thereof
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Owner:JCET GROUP CO LTD

First packaged and then etched packaging structure with single chip normally installed and base islands buried and preparation method of structure

ActiveCN102856283BLow costImprove the level ofSemiconductor/solid-state device detailsSolid-state devicesHigh densityEngineering
The invention relates to a first packaged and then etched packaging structure with a single chip normally installed and base islands buried and a preparation method of the structure. The structure comprises base islands (1) and pins (2), wherein a chip (4) is arranged on the fronts of the base islands (1); the front face of the chip (4) and the front faces of the pins (2) are connected by metal wires (5); plastic package materials (6) are arranged in the surrounding regions of the base islands (1) and the pins (2) and outside the chip (4) and the metal wires (5); small holes (7) are formed on the surfaces of the plastic package materials (6) on the lower parts of the pins (2); the small holes (7) are communicated with the backs of the pins (2); metal balls (9) are arranged in the small holes (7); and the metal balls (9) are contacted with the backs of the pins (2). The packaging structure and the preparation method have the following beneficial effects that the preparation cost is reduced; the safety and reliability of the packaging body are improved; environmental pollution is reduced; and design and preparation of high-density circuits are truly achieved.
First packaged and then etched packaging structure with single chip normally installed and base islands buried and preparation method of structure
First packaged and then etched packaging structure with single chip normally installed and base islands buried and preparation method of structure
First packaged and then etched packaging structure with single chip normally installed and base islands buried and preparation method of structure
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Owner:JCET GROUP CO LTD

Multi-chip positive packaging structure for embedding basic island by first packaging and second etching, and manufacturing method for multi-chip positive packaging structure

ActiveCN102881670BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesEtchingHigh density
The invention relates to a multi-chip positive packaging structure for embedding a basic island by first packaging and second etching, and a manufacturing method for the multi-chip positive packaging structure. The multi-chip positive packaging structure comprises the basic island (1) and pins (2), wherein chips (4) are arranged on the front face of the basic island (1); the front faces of the chips (4) are connected with the front faces of the pins (2) through metal wires (5); plastic materials (6) wrap the surrounding regions of the basic island (1) and the pins (2) as well as the chips (4) and the metal wires (5); small holes (7) are formed in the surfaces of the plastic materials (6) on the lower parts of the pins (2) and are communicated with the back faces of the pins (2); and metal balls (9) are arranged in the small holes (7) and are in contact with the back faces of the pins (2). The multi-chip positive packaging structure has the advantages that the manufacturing cost is reduced, the safety and the reliability of a package body are improved, the environment pollution is reduced, and design and manufacturing of a high-density line can be really realized.
Multi-chip positive packaging structure for embedding basic island by first packaging and second etching, and manufacturing method for multi-chip positive packaging structure
Multi-chip positive packaging structure for embedding basic island by first packaging and second etching, and manufacturing method for multi-chip positive packaging structure
Multi-chip positive packaging structure for embedding basic island by first packaging and second etching, and manufacturing method for multi-chip positive packaging structure
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Owner:JCET GROUP CO LTD

Multi-chip front-mount packaging structure with etching first and packaging without base island and its manufacturing method

ActiveCN102856291BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityEngineering
The invention relates to a first etched and then packaged packaging structure with multiple chips normally installed and base islands buried as well as a preparation method thereof. The structure comprises base islands (1) and pins (2), wherein chips (4) are arranged on the fronts of the base islands (1); the fronts of the chips (4) and the fronts of the pins (2) are connected by metal wires (5); plastic package materials (6) are arranged in the surrounding regions of the base islands (1) and the pins (2) and outside the chips (4) and the metal wires (5); small holes (7) are arranged on the surfaces of the plastic package materials (6) on the lower parts of the pins (2); the small holes (7) are communicated with the backs of the pins (2); metal balls (9) are arranged in the small holes (7); and the metal balls (9) are contacted with the backs of the pins (2). The packaging structure and the preparation method have the following beneficial effects that the preparation cost is reduced; the safety and reliability of the packaging body are improved; environmental pollution is reduced; and design and preparation of high-density circuits are truly achieved.
Multi-chip front-mount packaging structure with etching first and packaging without base island and its manufacturing method
Multi-chip front-mount packaging structure with etching first and packaging without base island and its manufacturing method
Multi-chip front-mount packaging structure with etching first and packaging without base island and its manufacturing method
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Owner:JCET GROUP CO LTD

First etched and then packaged packaging structure with single chip reversedly installed and base islands exposed and preparation method of structure

ActiveCN102856289ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityEngineering
The invention relates to a first etched and then packaged packaging structure with a single chip reversedly installed and base islands exposed and a preparation method of the structure. The structure comprises base islands (1), pins (2) and a chip (3), wherein the chip (3) is reversedly installed on the front faces of the base islands (1) and the pins (2); underfills (14) are arranged among the bottom of the chip (3), the fronts of the base islands (1) and the pins (2); plastic package materials (4) are arranged in the peripheral regions of the base islands (1), the regions between the base islands (1) and the pins (2) and the regions between the pins (2) and outside the chip (3); small holes (5) are formed on the surfaces of the plastic package materials (4) on the lower parts of the base islands (1) and the pins (2); and metal balls (7) are arranged in the small holes (5). The packaging structure and the preparation method have the following beneficial effects that the preparation cost is reduced; the safety and reliability of the packaging body are improved; environmental pollution is reduced; and design and preparation of high-density circuits are truly achieved.
First etched and then packaged packaging structure with single chip reversedly installed and base islands exposed and preparation method of structure
First etched and then packaged packaging structure with single chip reversedly installed and base islands exposed and preparation method of structure
First etched and then packaged packaging structure with single chip reversedly installed and base islands exposed and preparation method of structure
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Owner:JCET GROUP CO LTD

First packaged and then etched packaging structure with multiple chips reversedly installed and base islands buried and preparation method of structure

ActiveCN102856267BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityEngineering
The invention relates to a first packaged and then etched packaging structure with multiple chips reversedly installed and base islands buried and a preparation method of the structure. The packaging structure comprises base islands (1), pins (2) and a plurality of chips (3), wherein the chips are reversedly installed on the front faces of the base islands and the front faces of the pins; underfills (14) are arranged among the bottoms of the chips, the fronts of the base islands and the pins; plastic package materials (4) are arranged in the peripheral regions of the base islands, the regions between the base islands and the pins, the regions between the pins, the regions on the upper parts of the base islands and the pins and the regions on the lower parts of the base islands and the pins and on the peripheries of the chips; small holes (5) are formed on the plastic package materials at the backs of the pins and are communicated with the backs of the pins; and metal balls (7) are arranged in the small holes and are contacted with the backs of the pins. The packaging structure and the preparation method have the following beneficial effects that the preparation cost is reduced; the safety and reliability of the packaging body are improved; environmental pollution is reduced; and design and preparation of high-density circuits are truly achieved.
First packaged and then etched packaging structure with multiple chips reversedly installed and base islands buried and preparation method of structure
First packaged and then etched packaging structure with multiple chips reversedly installed and base islands buried and preparation method of structure
First packaged and then etched packaging structure with multiple chips reversedly installed and base islands buried and preparation method of structure
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Owner:江阴芯智联电子科技有限公司

Manufacture method of flip chip single-faced three-dimensional circuit manufactured by encapsulation prior to etching and flip chip single-faced three-dimensional circuit encapsulation structure

ActiveCN102723288BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesEtchingHigh density
The invention relates to a flip chip single-faced three-dimensional circuit manufacture method by encapsulation prior to etching. The method includes: taking a metal substrate; preplating copper to the metal substrate surface; coating with green paint; partially removing the green paint on the front of the metal substrate; electroplating an inert metal circuit layer; electroplating a metal circuit layer; coating with green paint; partially removing the green paint on the front of the metal substrate; electroplating metal circuit layer; coating with green paint; partially removing the green paint on the front of the metal substrate; coating a circuit screen plate; performing metallization pretreatment; removing the circuit screen plate; electroplating a metal circuit layer; mounting a chip and filling the bottom of the chip; encapsulating; partially removing the green paint on the back of the metal substrate; performing chemical etching; electroplating a metal circuit layer; coating with green paint; reserving holes on the green paint; cleaning; attaching balls; and cutting finished products. The flip chip single-faced three-dimensional circuit manufacture method by encapsulation prior to etching has the advantages that manufacture cost is lowered, safety and reliability of encapsulation are enhanced, environmental pollution is reduced, and design and manufacture of high density circuit are really achieved.
Manufacture method of flip chip single-faced three-dimensional circuit manufactured by encapsulation prior to etching and flip chip single-faced three-dimensional circuit encapsulation structure
Manufacture method of flip chip single-faced three-dimensional circuit manufactured by encapsulation prior to etching and flip chip single-faced three-dimensional circuit encapsulation structure
Manufacture method of flip chip single-faced three-dimensional circuit manufactured by encapsulation prior to etching and flip chip single-faced three-dimensional circuit encapsulation structure
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Owner:JCET GROUP CO LTD

Flip chip double-faced three-dimensional circuit manufacture method by encapsulation prior to etching and flip chip double-faced three-dimensional circuit encapsulation structure

ActiveCN102723291BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityMetallurgy
The present invention involves a double -sided three -dimensional line chip inverted and eroded and then sealing the manufacturing method and its packaging structure. The method includes the following steps: take the metal substrate;Remove part of the optical resistance film; electroplating inert metal line layer; electroplating metal line layer; removing photore resistance membrane; packaging; plastic seal surface opening; digging grooves; electroplating conductive metal; metalization before processing; electroplating metal line layer; chemistry; chemistry; chemistry; chemistry; chemistry; chemistry; chemistry; chemistry; chemistry; chemistry;Etquette; electroplated metal line layer; coating and bonding material; loading; metal wire key; cleaning; ball planting and cutting finished products.The beneficial effect of the present invention is to reduce the cost of manufacturing, improve the safety and reliability of the packaging body, reduce environmental pollution, and can truly achieve the design and manufacturing of high -density lines.
Flip chip double-faced three-dimensional circuit manufacture method by encapsulation prior to etching and flip chip double-faced three-dimensional circuit encapsulation structure
Flip chip double-faced three-dimensional circuit manufacture method by encapsulation prior to etching and flip chip double-faced three-dimensional circuit encapsulation structure
Flip chip double-faced three-dimensional circuit manufacture method by encapsulation prior to etching and flip chip double-faced three-dimensional circuit encapsulation structure
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Owner:JCET GROUP CO LTD

Etching-first and packaging-later manufacturing method for chip formal single-surface three-dimensional circuit and packaging structure of chip formal single-surface three-dimensional circuit

ActiveCN102723285BLow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesEtchingHigh density
The invention relates to an etching-first and packaging-later manufacturing method for a chip formal single-surface three-dimensional circuit and a packaging structure of the chip formal single-surface three-dimensional circuit. The method comprises the following steps of taking a metal substrate; pre-plating copper on the surface of the metal substrate; carrying out the operation of pasting a photo-resisting film; removing a part of the photo-resisting film from the back surface of the metal substrate; electro-plating an inert metal circuit layer; electro-plating a metal circuit layer; removing the photo-resisting film; packaging; tapping on the surface of plastic package material; digging a groove; electro-plating an electric conduction metal; pre-processing of metallization; electro-plating the metal circuit layer; chemical-etching; electro-plating the metal circuit layer; coating bonding materials; installing a chip; bonding with metal wires; cleaning; implanting a metal ball; and cutting a finished product. The method disclosed by the invention has the beneficial effects that the manufacturing cost is lowered, the safety and the reliability of a packaging body are increased, the environment pollution is reduced, and the design and the manufacturing of a high-density circuit can be really realized.
Etching-first and packaging-later manufacturing method for chip formal single-surface three-dimensional circuit and packaging structure of chip formal single-surface three-dimensional circuit
Etching-first and packaging-later manufacturing method for chip formal single-surface three-dimensional circuit and packaging structure of chip formal single-surface three-dimensional circuit
Etching-first and packaging-later manufacturing method for chip formal single-surface three-dimensional circuit and packaging structure of chip formal single-surface three-dimensional circuit
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Owner:JCET GROUP CO LTD

Multi-chip inversely-mounted package-first etching-followed island-free package structure and manufacturing method thereof

ActiveCN102881664ALow costImprove securitySemiconductor/solid-state device detailsSolid-state devicesHigh densityAdhesive
The invention relates to a multi-chip inversely-mounted package-first etching-followed island-free package structure and a manufacturing method thereof. The structure comprises pins (1) and a plurality of chips (2), wherein the chips (2) are inversely mounted on the fronts of the pins (1), underfill adhesive (13) is arranged among the bottoms of the chips (2) and the fronts of the pins (1), periphery regions of the pins (1) and regions among the pins (1) are packed with plastic package materials (3), small holes (4) are formed on the surfaces of the plastic package materials (3) at the lower parts of the pins (1) and communicated with the backs of the pins (1), and metal balls (6) are arranged in the small holes (4) and contacted with the backs of the pins (1). The structure has the benefits that the manufacturing cost is lowered, the safety and reliability of a package body are improved, the environmental pollution is reduced, and the design and manufacturing of high density lines can be achieved in deed.
Multi-chip inversely-mounted package-first etching-followed island-free package structure and manufacturing method thereof
Multi-chip inversely-mounted package-first etching-followed island-free package structure and manufacturing method thereof
Multi-chip inversely-mounted package-first etching-followed island-free package structure and manufacturing method thereof
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Owner:JCET GROUP CO LTD

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