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Multi-chip inversely-mounted package-first etching-followed island-free package structure and manufacturing method thereof

A technology of packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve problems such as great differences in material characteristics, stress deformation, and reliability levels that affect reliability and safety capabilities. Achieve the effects of not being easy to stress and deform, reducing environmental pollution, and improving safety

Active Publication Date: 2013-01-16
JCET GROUP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0019]3. Glass fiber itself is a kind of foaming material, so it is easy to absorb moisture and moisture due to the storage time and environment, which directly affects the reliability and safety ability or is the level of reliability;
[0020] 4. The surface of the glass fiber is covered with a copper foil metal layer thickness of about 50-100 μm, and the etching distance between the metal layer line and the line can only achieve an etching gap of 50-100 μm due to the characteristics of the etching factor (see Figure 36 , the best production capacity is that the etching gap is approximately equal to the thickness of the etched object), so it is impossible to truly design and manufacture high-density circuits;
[0022]6. Also because the entire substrate material is made of glass fiber, the thickness of the glass fiber layer is obviously increased by 100~150μm, and it cannot be really ultra-thin encapsulation;
[0023]7. Due to the large difference in material characteristics (expansion coefficient) of the traditional glass fiber plus copper foil technology, it is easy to cause stress deformation in the harsh environment process, directly Affects the accuracy of component loading and the adhesion and reliability of components and substrates

Method used

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  • Multi-chip inversely-mounted package-first etching-followed island-free package structure and manufacturing method thereof
  • Multi-chip inversely-mounted package-first etching-followed island-free package structure and manufacturing method thereof
  • Multi-chip inversely-mounted package-first etching-followed island-free package structure and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0101] Example 1: No Base Island Single Turn Pin

[0102] Referring to FIG. 20(A) and FIG. 20(B), FIG. 20(A) is a schematic structural diagram of Embodiment 1 of the multi-chip flip-chip packaging first and then etching base-less island packaging structure of the present invention. FIG. 20(B) is a top view of FIG. 20(A). It can be seen from Fig. 20(A) and Fig. 20(B) that the multi-chip flip-chip packaging structure of the present invention is first packaged and then etched without base islands. It includes pins 1 and chips 2. There are multiple chips 2, so The plurality of chips 2 are flip-chip on the front of the pin 1, and an underfill glue 13 is provided between the bottom of the chip 2 and the front of the pin 1, and the area around the pin 1, between the pin 1 and the pin 1 The area of ​​the upper part of the pin 1 and the lower part of the pin 1, and the outside of the chip 2 are all encapsulated with a plastic compound 3, and the surface of the plastic compound 3 at th...

Embodiment 2

[0145] Embodiment 2, no base island single-turn pin passive device

[0146] Referring to FIG. 21(A) and FIG. 21(B), FIG. 21(A) is a schematic structural diagram of Embodiment 2 of the multi-chip flip-chip packaging first and then etching baseless island packaging structure of the present invention. FIG. 21(B) is a top view of FIG. 21(A). It can be seen from Fig. 21(A) and Fig. 21(B) that the only difference between Embodiment 2 and Embodiment 1 is that the passive connection between pin 1 and pin 1 is bridged by a conductive bonding material. The device 7, the passive device 7 may be connected between the front of the pin 1 and the front of the pin 1, or may be connected between the back of the pin 1 and the back of the pin 1.

Embodiment 3

[0147] Example 3: Multiturn pins without base island

[0148] Referring to FIG. 22(A) and FIG. 22(B), FIG. 22(A) is a schematic structural diagram of Embodiment 3 of the multi-chip flip-chip packaging first and then etching the substrate-free packaging structure of the present invention. Fig. 22(B) is a top view of Fig. 22(A). It can be seen from FIG. 22(A) and FIG. 22(B) that the only difference between embodiment 3 and embodiment 1 is that the pin 1 has multiple turns.

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Abstract

The invention relates to a multi-chip inversely-mounted package-first etching-followed island-free package structure and a manufacturing method thereof. The structure comprises pins (1) and a plurality of chips (2), wherein the chips (2) are inversely mounted on the fronts of the pins (1), underfill adhesive (13) is arranged among the bottoms of the chips (2) and the fronts of the pins (1), periphery regions of the pins (1) and regions among the pins (1) are packed with plastic package materials (3), small holes (4) are formed on the surfaces of the plastic package materials (3) at the lower parts of the pins (1) and communicated with the backs of the pins (1), and metal balls (6) are arranged in the small holes (4) and contacted with the backs of the pins (1). The structure has the benefits that the manufacturing cost is lowered, the safety and reliability of a package body are improved, the environmental pollution is reduced, and the design and manufacturing of high density lines can be achieved in deed.

Description

technical field [0001] The invention relates to a multi-chip flip-chip package first and then etch baseless island package structure and a manufacturing method thereof, which belong to the technical field of semiconductor package. Background technique [0002] The manufacturing process flow of the traditional high-density substrate package structure is as follows: [0003] Step 1, see Figure 24 , take a substrate made of glass fiber material, [0004] Step two, see Figure 25 , opening holes at desired locations on the fiberglass substrate, [0005] Step three, see Figure 26 , coated with a layer of copper foil on the back of the glass fiber substrate, [0006] Step 4, see Figure 27 , fill the conductive material in the position where the glass fiber substrate is punched, [0007] Step five, see Figure 28 , coated with a layer of copper foil on the front of the glass fiber substrate, [0008] Step six, see Figure 29 , coated with a photoresist film on the surfa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L23/495H01L21/50
CPCH01L24/97H01L2224/73204H01L2924/01322H01L2924/00
Inventor 王新潮梁志忠李维平
Owner JCET GROUP CO LTD
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