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Multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof

A technology of packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device parts, semiconductor devices, etc., can solve the level of material characteristics that vary greatly, stress deformation, and reliability that affect reliability and safety capabilities and other problems, to achieve the effects of not being easy to deform due to stress, reducing environmental pollution, and improving safety

Active Publication Date: 2013-01-02
星科金朋半导体(江阴)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0019]3. Glass fiber itself is a kind of foaming material, so it is easy to absorb moisture and moisture due to the storage time and environment, which directly affects the reliability and safety ability or is the level of reliability;
[0020] 4. The surface of the glass fiber is covered with a copper foil metal layer thickness of about 50-100 μm, and the etching distance between the metal layer line and the line can only achieve an etching gap of 50-100 μm due to the characteristics of the etching factor (see Figure 50 , the best production capacity is that the etching gap is approximately equal to the thickness of the etched object), so it is impossible to truly design and manufacture high-density circuits;
[0022]6. Also because the entire substrate material is made of glass fiber, the thickness of the glass fiber layer is obviously increased by 100~150μm, and it cannot be really ultra-thin encapsulation;
[0023]7. Due to the large difference in material characteristics (expansion coefficient) of the traditional glass fiber plus copper foil technology, it is easy to cause stress deformation in the harsh environment process, directly Affects the accuracy of component loading and the adhesion and reliability of components and substrates

Method used

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  • Multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof
  • Multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof
  • Multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0136] Example 1: Single Base Island Single Turn Pin

[0137] Referring to FIG. 22(A) and FIG. 22(B), FIG. 22(A) is a schematic structural diagram of Embodiment 1 of the present invention where multi-chips are packaged first and then etched to expose the package structure. Fig. 22(B) is a top view of Fig. 22(A). It can be seen from Fig. 22(A) and Fig. 22(B) that the multi-chip package of the present invention is packaged first and then the base island is etched to expose the packaging structure. The non-conductive adhesive substance 3 is provided with a plurality of chips 4, and the front of the chip 4 is connected with the front of the pin 2 with a metal wire 5, and the area around the base island 1, the base island 1 and the pin 2 The area between pin 2 and pin 2, the area above base island 1 and pin 2, the area below base island 1 and pin 2, and the chip 4 and metal wire 5 are all encapsulated with plastic encapsulant 6. A small hole 7 is opened on the surface of the mold...

Embodiment 2

[0186] Example 2: ESD ring with single-base island and single-turn pins

[0187] Referring to FIG. 23(A) and FIG. 23(B), FIG. 23(A) is a schematic structural diagram of embodiment 2 of the present invention, where the multi-chips are packaged first and then etched to expose the package structure. FIG. 23(B) is a top view of FIG. 23(A). It can be seen from Fig. 23(A) and Fig. 23(B) that the difference between Embodiment 2 and Embodiment 1 is that an electrostatic discharge ring 10 is provided between the base island 1 and the pin 2, and the The front of the ESD ring 10 is connected to the front of the chip 4 through a metal wire 5 .

Embodiment 3

[0188] Example 3: Single base island single turn pin passive device

[0189] Referring to FIG. 24(A) and FIG. 24(B), FIG. 24(A) is a schematic structural diagram of Embodiment 3 of the multi-chip front-mounting of the present invention, packaging first, and then etching the base island to expose the packaging structure. Fig. 24(B) is a top view of Fig. 24(A). It can be seen from Fig. 24(A) and Fig. 24(B) that the difference between Embodiment 3 and Embodiment 1 is only that: the conductive bonding material is used to bridge the passive between the pin 2 and the pin 2 The device 11, the passive device 11 may be connected between the front of the pin 2 and the front of the pin 2, or may be connected between the back of the pin 2 and the back of the pin 2.

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Abstract

The invention relates to a multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and a manufacturing method thereof. The structure comprises pads (1) and pins (2). A plurality of chips (4) are arranged on the right sides of the pads (1), and the right sides of the chips (4) and the pins (2) are connected through metal wires (5). Molding compounds (6) are packaged on the peripheries of the pads (1) and the pins (2) and outside the chips (4) and the metal wires (5). Holes (7) are opened on the surfaces of the molding compounds (6) on the lower portions of the pads (1) and the pins (2). Metal balls (9) are arranged in the holes (7) and contacted with the reverse sides of the pads (1) or the pins (2). The multi-chip horizontal packaging, etching-after-packaging and pad exposed packaging structure and the manufacturing method thereof have the advantages of reducing manufacturing costs, improving safety and reliability of packaging bodies, reducing environmental pollution, and being capable of designing and manufacturing high-density lines.

Description

technical field [0001] The invention relates to a packaging structure and a manufacturing method thereof for packaging a multi-chip front-mounting package first and then etching a base island to expose the packaging structure. It belongs to the technical field of semiconductor packaging. Background technique [0002] The manufacturing process flow of the traditional high-density substrate package structure is as follows: [0003] Step 1, see Figure 38 , take a substrate made of glass fiber material, [0004] Step two, see Figure 39 , opening holes at desired locations on the fiberglass substrate, [0005] Step three, see Figure 40 , coated with a layer of copper foil on the back of the glass fiber substrate, [0006] Step 4, see Figure 41 , fill the conductive material in the position where the glass fiber substrate is punched, [0007] Step five, see Figure 42 , coated with a layer of copper foil on the front of the glass fiber substrate, [0008] Step six, se...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/495H01L23/31H01L21/50
CPCH01L2224/92247H01L24/97H01L2924/15311H01L2224/48137H01L2224/48091H01L2224/73265H01L2224/49171H01L2224/97H01L2924/07802H01L2924/01322H01L2924/181H01L2924/00014H01L2224/85H01L2924/00H01L2924/00012
Inventor 王新潮梁志忠李维平
Owner 星科金朋半导体(江阴)有限公司
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