Multi-chip positive packaging structure for embedding basic island by first packaging and second etching, and manufacturing method for multi-chip positive packaging structure
A packaging structure, multi-chip technology, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as large differences in material characteristics, stress deformation, affecting reliability, safety capability, reliability level, etc. Effects of less stress and deformation, reduced environmental pollution, and improved safety
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0135] Embodiment 1: single-base island single-turn pin
[0136] Referring to FIG. 22(A) and FIG. 22(B), FIG. 22(A) is a schematic structural diagram of Embodiment 1 of the multi-chip front-mounting, first packaging, and then etching base island embedded packaging structure of the present invention. Fig. 22(B) is a top view of Fig. 22(A). It can be seen from Fig. 22(A) and Fig. 22(B) that the multi-chip packaging structure of the present invention is packaged first and then etched into the base island, which includes the base island 1 and pins 2. Or the non-conductive adhesive substance 3 is provided with a plurality of chips 4, the front of the chip 4 is connected with the front of the pin 2 with a metal wire 5, and the front of the chip 4 is connected with the front of the chip 4 with a metal wire 5 , the area around the base island 1, the area between the base island 1 and the pin 2, the area between the pin 2 and the pin 2, the area above the base island 1 and the pin 2, ...
Embodiment 2
[0180] Example 2: ESD ring with single-base island and single-turn pins
[0181] Referring to FIG. 23(A) and FIG. 23(B), FIG. 23(A) is a schematic structural diagram of Embodiment 2 of the multi-chip front-mounting, first packaging, and then etching base island embedded packaging structure of the present invention. FIG. 23(B) is a top view of FIG. 23(A). It can be seen from Fig. 23(A) and Fig. 23(B) that the difference between Embodiment 2 and Embodiment 1 is that an electrostatic discharge ring 10 is provided between the base island 1 and the pin 2, and the The front of the ESD ring 10 is connected to the front of the chip 4 through a metal wire 5 .
Embodiment 3
[0182] Example 3: Single base island single turn pin passive device
[0183] Referring to FIG. 24(A) and FIG. 24(B), FIG. 24(A) is a schematic structural diagram of Embodiment 3 of the multi-chip front-mounting, first packaging, and then etching base island embedded packaging structure of the present invention. Fig. 24(B) is a top view of Fig. 24(A). It can be seen from Fig. 24(A) and Fig. 24(B) that the difference between Embodiment 3 and Embodiment 1 is only that: the conductive bonding material is used to bridge the passive between the pin 2 and the pin 2 The device 11, the passive device 11 may be connected between the front of the pin 2 and the front of the pin 2, or may be connected between the back of the pin 2 and the back of the pin 2.
PUM
Abstract
Description
Claims
Application Information
- R&D Engineer
- R&D Manager
- IP Professional
- Industry Leading Data Capabilities
- Powerful AI technology
- Patent DNA Extraction
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com