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High-speed low-power-consumption cyclic code encoder

A cyclic code and low power consumption technology, which is applied in the field of high-speed and low-power cyclic code encoders, can solve problems such as power consumption increase, speed reduction, and analog-to-digital converter performance impact, so as to reduce power consumption, increase speed, The effect of reducing the output load capacitance

Inactive Publication Date: 2013-01-09
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  • Abstract
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Problems solved by technology

The ROM encoder has a regular structure and is easy to implement, but with the increase of the ADC resolution, the complexity of the ROM encoder increases exponentially, resulting in a sharp decrease in speed and a rapid increase in power consumption, which brings a negative impact on the performance of the entire analog-to-digital converter. great influence

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  • High-speed low-power-consumption cyclic code encoder
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  • High-speed low-power-consumption cyclic code encoder

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Embodiment Construction

[0028] The above and other technical features and advantages of the present invention will be described in more detail below in conjunction with the accompanying drawings.

[0029] refer to figure 1 As shown, it is the corresponding relationship diagram of sequential code, cyclic code and binary code, by comparing figure 1 The cyclic code and binary code in can get the following XOR-OR relationship:

[0030] B 3 = CT 4

[0031] B 2 = CT 4 ⊕ CT 2

[0032] B 1 = CT 4 ⊕ CT 3 + CT 2 ⊕ CT 1 - - - ( 1 )

[0033] This formula can be further expanded. For...

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Abstract

The invention discloses a high-speed low-power-consumption cyclic code encoder which comprises a preprocessing module and an or module, wherein the preprocessing module is used for realizing a plurality of exclusive or logics by the aid of a plurality of domino circuits, the domino circuits receive a clock signal and are provided with a plurality of output ends, and the or module is used for realizing or logics and comprises a plurality of MOS (metal oxide semiconductor) transistors in parallel connection, and grid electrodes of the MOS transistors are connected to the output ends of the domino circuits. By the aid of the cascade domino circuits, output load capacitance can be decreased, so that speed is increased, and power consumption is reduced.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a high-speed and low-power cyclic code encoder. Background technique [0002] The process of analog-to-digital conversion is mainly composed of three parts: sampling, quantization and encoding. The quantized digital quantity can be represented by a variety of codes, such as sequential codes, cyclic codes, etc. Different code systems have different characteristics and are applied to different analog-to-digital converter (ADC) structures. figure 1 Taking the three-bit binary code as an example, the corresponding relationship between the sequential code, the cyclic code and the final output binary code is given. It can be seen from the figure that the information volume of the cyclic code is twice that of the sequential code. [0003] Whether it is a sequential code or a cyclic code, there is only one conversion between 0-1 and 1-0. Therefore, if you want to convert fro...

Claims

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Application Information

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IPC IPC(8): H03M1/40
Inventor 郭宝安徐树民刘振
Owner AEROSPACE INFORMATION
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