Power-on resetting circuit

Abstract

The invention discloses a power-on resetting circuit which comprises a power-on circuit, a level triggering circuit and a discharging circuit, wherein the power-on circuit comprises a current mirror, a first capacitor and a second capacitor; when power-on voltage is supplied to the power-on resetting circuit, the current mirror respectively charges the first capacitor and the second capacitor; the level triggering circuit is connected to a voltage reference node of a power-on circuit and is used for detecting the voltage of the voltage reference node and outputting a power-on resetting signal when the voltage of the voltage reference node is greater than a triggering value; and the discharging circuit is connected between the power-on circuit and the level triggering circuit and is used for discharging the first capacitor and the second capacitor after the power-on voltage disappears. By the power-on resetting circuit, when power voltage is powered on for many times, the power-on resetting signal can still be correctly generated; and after the resetting signal is generated, a static working current dose not exist, so that the power consumption is reduced.

Description

[0001] technical field [0002] The invention relates to the field of integrated circuits, in particular to a power-on reset circuit. [0003] Background technique [0004] The power-on reset circuit has always been a necessary basic circuit module in the digital-analog hybrid and digital fields. When the digital circuit is powered on, in order to ensure the correct power-on logic sequence, it is necessary to keep the generated logic level in a certain state during the rise of the power supply voltage, and wait until the power supply voltage rises (that is, the process of power-on) to the specified value Then automatically jump to the working state and let the circuit start to work, so as to avoid the error state. The mainstream power-on reset current generally uses an RC delay circuit. After the power supply voltage rises to a specified value, a pulse signal with a certain pulse width is generated as a power-on reset signal. However, when the situation of rapid power-off...

AI Technical Summary

Problems solved by technology

However, when the situation of rapid power-off and power-on occurs, the charge of the capacitor in the RC circuit cannot quickly release the charge through the reverse-biased diode, which may cause the power-on reset circuit to fail to correctly generate power-on reset when continuous rapid power-on occurs. signal, which in turn affects the reliability and stability of the system. In addition, since the power-on reset circuit has a static operating current after the power-on reset signal is generated, it also leads to unnecessary power consumption

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