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Complex programmable logic device (CPLD) programme based test system of analog-to-digital (AD) converter

A test system and converter technology, applied in the direction of analog/digital conversion calibration/testing, etc., can solve the problems of large conversion accuracy error, complex calculation of post-data parameters, and many A/D converter test points, etc., to achieve hardware circuit structure Simple, low-cost effect

Active Publication Date: 2013-02-13
EAST CHINA INST OF OPTOELECTRONICS INTEGRATEDDEVICE
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The purpose of the present invention is to aim at present A / D converter test point is many, and parameter calculation is complicated after measuring data, especially when the serial data rate of A / D converter output is high, test A / D conversion precision error is big Difficulty, design a test system for AD converter based on CPLD programming

Method used

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  • Complex programmable logic device (CPLD) programme based test system of analog-to-digital (AD) converter
  • Complex programmable logic device (CPLD) programme based test system of analog-to-digital (AD) converter
  • Complex programmable logic device (CPLD) programme based test system of analog-to-digital (AD) converter

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Embodiment Construction

[0023] The present invention will be further described below in conjunction with accompanying drawing.

[0024] This high-precision A / D converter test system based on CPLD programming includes 16-bit serial A / D conversion circuit U1, CPLD programmable control circuit U2, clock circuit U4, single-chip microcomputer circuit U3, and serial port level conversion circuit U5.

[0025] Such as figure 1 As shown, the input terminals VHELM0C, VHELM1C, VHELM2C, VHELM3C, TEST, ADCH4, ADCH5 and GND of the 16-bit serial A / D conversion circuit U1 are the input terminals of the internal 8-way analog switch, and its input terminals CHE0, CHE1 and CHE2 It is the gate control terminal of the internal 8-way analog switch,

[0026] Such as figure 2 , 4 As shown, the CPLD programmable control circuit U2 has a clock input terminal, the clock input terminal is the input terminal CLK of the programmable control system, which is connected to the output terminal CLK of the clock circuit U...

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Abstract

The invention relates to a CPLD programme based test system of an AD converter. The test system comprises a CPLD programmable control circuit U2, a single chip microcomputer circuit U3, a serial port level converting circuit U5 and a 16-bit serial A / D converter circuit U1, wherein the CPLD programmable control circuit U2, the single chip microcomputer circuit U3, the serial port level converting circuit U5 and the 16-bit serial A / D converter circuit U1 are in protocol communication with a universal asynchronous receiver / transmitter (UART) port through a serial peripheral interface (SPI). Conversion data of the 16-bit serial A / D converter circuit are processed by combination of a single chip microcomputer and a CPLD, the hardware circuit is simple in structure and low in cost, and by the aid of the test system, the conversion error of a 16-bit precision A / D converter is tested to be 4LSB.

Description

[0001] technical field [0002] The invention relates to a test of an A / D converter, in particular to the test of an A / D conversion circuit requiring high data transmission rate after conversion and high parameter precision. [0003] Background technique [0004] At present, the A / D converter has many test points, the measured conversion accuracy error is large, the data transmission rate after A / D conversion is high, and the post-processing of test data is complicated. Aiming at this situation, a testing method of high-precision A / D converter based on CPLD programming is proposed. [0005] Contents of the invention [0006] The purpose of the present invention is to aim at present A / D converter test point is many, and parameter calculation is complicated after measuring data, especially when the serial data rate of A / D converter output is high, test A / D conversion precision error is big The problem is to design a test system for AD converter based on CPLD programming. ...

Claims

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Application Information

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IPC IPC(8): H03M1/10
Inventor 薛海英
Owner EAST CHINA INST OF OPTOELECTRONICS INTEGRATEDDEVICE
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