Silicon on insulator structure and semiconductor device structure

Abstract

The invention provides a silicon on insulator structure and a semiconductor device structure. The silicon on insulator structure comprises a first silicon layer, a first buried oxide layer formed on the first silicon layer, a second silicon layer formed on the first buried oxide layer, a second buried oxide layer formed on the second silicon layer, and a third silicon layer formed on the second buried oxide layer. By adopting the silicon on insulator structure, a double gate transistor structure can be utilized, and the stray capacitance between the semiconductor device which is arranged on the silicon on insulator structure and a substrate is effectively reduced.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, more specifically, the invention relates to a silicon-on-insulator structure and a semiconductor device structure using the silicon-on-insulator structure. Background technique [0002] Silicon-on-insulator (SOI, Silicon-on-insulator) is being used more and more widely as the demand for faster speed and lower temperature of semiconductor devices emerges. The main feature of the silicon-on-insulator structure is that an insulating layer (buried oxide layer) is inserted between the active layer and the substrate layer to isolate the electrical connection between the active layer and the substrate. The device brings many advantages such as small parasitic effect, fast speed, low power consumption, high integration, and strong radiation resistance. [0003] Double gate (double gate) transistors have better scaling characteristics than conventional single gate transistors. Generally, the s...

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Problems solved by technology

The thickness of the buried oxide layer 102 is preferably equivalent to the thickness of the positive gate oxide layer, generally However, in the above-mentioned semiconductor devices formed on silicon-on-insulator, the parasitic capacitance between the device and the silicon base layer will increase due to the reduction of the thickness of the buried oxide layer. In some high-frequency applications, the parasitic capacitance changes Big is unable to meet product requirements

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