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A method of manufacturing a semiconductor device

A manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, etc., can solve the problems of the interface layer 105 being difficult to be removed, affecting the electrical properties of the high-k metal gate structure 109, etc.

Active Publication Date: 2015-12-09
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since in the previous etching process, the interface layer 105 is difficult to be removed, and it has a higher resistance than the cover layer 102, so it will affect the electrical performance of the high-k metal gate structure 109

Method used

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  • A method of manufacturing a semiconductor device
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Embodiment Construction

[0027] In the following description, a lot of specific details are given in order to provide a more thorough understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features known in the art are not described.

[0028] In order to thoroughly understand the present invention, detailed steps will be presented in the following description to explain how the present invention forms the sidewalls of the high-k metal gate structure. Obviously, the implementation of the present invention is not limited to the specific details familiar to those skilled in the semiconductor field. The preferred embodiments of the present invention are described in detail as follows. However, in addition to these detailed descriptions, the present invention may also have other embodiments.

[0029] It...

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Abstract

The invention provides a manufacturing method of semiconductor devices. The manufacturing method includes providing a semiconductor substrate, forming a virtual grid structure which comprises a capping layer and a sacrificial grid electrode layer on the semiconductor substrate; forming a oxygen-free side wall on the top and the side of the virtual grid structure; forming gap wall structures close to the side wall on the two sides of the virtual grid structure; removing the sacrificial grid electrode layer to form a grid trench in the middle of the gap wall structures; performing backfill of metal grids and filling the grid trench. In the process of forming the side wall of the high-k metal grid structure of a CMOS (complementary metal oxide semiconductor) device, generation of an interference layer between the capping layer and the metal grid layer of the high-k metal grid structure can be avoided.

Description

Technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for forming the sidewall of a high-k metal gate structure. Background technique [0002] With the continuous innovation of integrated circuit manufacturing technology, the size of various components in the integrated circuit continues to shrink, while the functional density continues to increase. The continuous development of integrated circuit manufacturing technology under the principle of scaling down improves production efficiency and reduces manufacturing costs; at the same time, it also brings high power consumption. By using semiconductor devices with low power consumption characteristics, such as complementary metal oxide semiconductor (CMOS), the above-mentioned high power consumption problem can be solved. [0003] Typical CMOS includes gate oxide and polysilicon gate. As the feature size of semiconductor devices continues to decrease, the use of high-k gate ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28
Inventor 平延磊
Owner SEMICON MFG INT (SHANGHAI) CORP