Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Liquid crystal display device, polysilicon array substrate and manufacturing method

A manufacturing method and array substrate technology, which are applied in semiconductor/solid-state device manufacturing, instrumentation, optics, etc., can solve the problems of high manufacturing cost and complicated manufacturing process of display panels, and achieve improved display effect, simplified interlayer structure, simplified The effect of the production process

Inactive Publication Date: 2016-05-25
BOE TECH GRP CO LTD +1
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The manufacturing process of the above-mentioned LTPS array substrate is relatively complicated, requiring at least 10 patterning processes, so the manufacturing cost of the entire display panel is relatively high

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Liquid crystal display device, polysilicon array substrate and manufacturing method
  • Liquid crystal display device, polysilicon array substrate and manufacturing method
  • Liquid crystal display device, polysilicon array substrate and manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

specific Embodiment approach

[0045] As a specific embodiment of the present invention, a method for manufacturing an array substrate is used to form the above-mentioned top-gate TFT polysilicon array substrate, such as Figure 4 As shown, the method includes:

[0046] Step S1, forming a polysilicon active layer and a pixel electrode.

[0047] It should be noted that, in the present invention, the patterning process includes steps such as glue application, exposure, development, etching, and photoresist stripping.

[0048] Specifically, such as Figure 2a As shown, first a buffer layer 2 is formed on the substrate 1, and then an amorphous silicon layer is formed on the buffer layer 2, and the amorphous silicon layer is converted into a polysilicon layer by excimer laser annealing process using low-temperature polysilicon technology. Then, a polysilicon active layer 3 is formed through one patterning process through process steps such as masking, exposure, etching, and photoresist removal. Then, a transp...

Embodiment approach

[0062] As a preferred implementation mode of the present invention, a method for manufacturing an array substrate in this embodiment further includes:

[0063] Step S7, forming a passivation layer on the substrate after step S6, and forming peripheral connection holes through a patterning process.

[0064] Specifically, such as Figure 2g As shown, firstly a layer of insulating material is formed on the substrate after step S6 to form a passivation layer 12 . The passivation layer 12 is used to protect structures and devices in the array substrate, and then a peripheral connection hole (not shown) is formed through a patterning process.

[0065] The manufacturing method of the array substrate provided by the present invention saves the organic layer and via structure in the prior art by adjusting the interlayer position of the pixel electrode and the common electrode in the polysilicon array substrate, and simplifies the interlayer structure of the array substrate. The produ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The embodiment of the invention discloses a liquid crystal display device, a polysilicon array substrate and a manufacturing method, relates to the field of liquid crystal display and specifically relates to an inter-layer structure of the array substrate and a production process of the array substrate. The polysilicon array substrate disclosed by the embodiment of the invention comprises a polysilicon TFT (thin-film transistor), as well as a pixel electrode which is arranged in the same layer with an active layer of the polysilicon TFT and a public electrode which is arranged in the same layer with a gate of the polysilicon TFT, wherein the public electrode and the pixel electrode are oppositely arranged, and the electrode which is positioned at the upper part in the public electrode and the pixel electrode is a slit-like electrode.

Description

technical field [0001] The invention relates to the field of liquid crystal display, in particular to a liquid crystal display device, a polysilicon array substrate and a manufacturing method. Background technique [0002] In recent years, with the application of liquid crystal display products more and more widely, liquid crystal display technology has become more and more perfect. TFT-LCD (ThinFilmTransistor-LiquidCrystalDisplay, Thin Film Field Effect Transistor-Liquid Crystal Display) occupies a very important position in the display field with its advantages of high-quality image display, low energy consumption, and environmental protection. [0003] As a new manufacturing process of TFT-LCD, LTPS (LowTemperaturePoly-Silicon, low-temperature polysilicon) technology uses excimer laser annealing process to convert amorphous silicon (a-Si) thin film layer into polycrystalline silicon (Poly-Si) thin film layer. Compared with amorphous silicon materials, the electron mobili...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G02F1/1343G02F1/1362G02F1/1368H01L21/77
Inventor 辛燕霞朴承翊杨玉清石天雷杨慧光
Owner BOE TECH GRP CO LTD
Features
  • Generate Ideas
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com