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Semiconductor device

A semiconductor and device technology, applied in the field of semiconductor devices, to achieve high reliability

Inactive Publication Date: 2016-02-24
HITACHI LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition, in Non-Patent Document 3, it is described that a chalcogenide material requires about 120 ns for low resistance and about 50 ns for high resistance.

Method used

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  • Semiconductor device
  • Semiconductor device
  • Semiconductor device

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Embodiment approach

[0133] use Figure 2 to Figure 35 An information processing system to which an embodiment of the present invention is applied will be described.

[0134] figure 2 It is a block diagram showing an example of the configuration of an information processing system device composed of an information processing device CPU_CHIP and a memory module NVMSTR0 according to an embodiment of the present invention. Such as figure 2 As shown, the information processing device CPU_CHIP is not particularly limited, but here is a host controller that manages data stored in the memory module NVMSTR0 with a logical address LAD in units of at least 512 bytes. Data is read or written to the memory block NVMSTR0 through the interface signal HDH_IF.

[0135] The signal system for connecting the information processing device CPU_CHIP and the memory module NVMSTR0 includes a serial interface signal system, a parallel interface signal system, an optical interface signal system, and the like. It goes...

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Abstract

The present invention provides a semiconductor device having a nonvolatile memory device including a plurality of rewritable memory cells and a control circuit device for controlling access to the nonvolatile memory device, and proposes a device having the following functions As a control circuit device, that is, the assignment of the second address to the nonvolatile memory device is set independently from the first address provided from the outside, so that the address used for writing the first write data provided from the outside The physical arrangement of memory cells becomes arranged every N (N is a natural number) at least with respect to one direction. With the present invention, an information processing device with high reliability, long life, high-speed operation, and ease of use can be realized.

Description

technical field [0001] The present invention relates to semiconductor device technology including nonvolatile memory devices. Background technique [0002] In recent years, an SSD (Solid State Drive: Solid State Drive) composed of a plurality of NAND flash memories and a controller has been used in server equipment, laptop personal computers, notebook computers, and the like. For example, Non-Patent Document 4 discloses that there is an upper limit to the number of times of erasing in a NAND flash memory, and that there is a large difference between the data writing size and the data erasing size. In addition, for example, Patent Document 1, Patent Document 2, Patent Document 3, and Patent Document 4 disclose a method of controlling a NAND flash memory. [0003] Also, among the techniques studied by the inventors of the present invention, there is, for example, a semiconductor device including a phase-change memory. Such memories use chalcogenide materials (or phase change...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/06G06F3/06
CPCG06F12/0246G06F11/1072G11C14/009G11C29/52
Inventor 三浦誓士
Owner HITACHI LTD
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