A kind of array substrate, preparation method and liquid crystal display device
A technology for array substrates and substrates, applied in the fields of array substrates, preparation, and liquid crystal display devices, can solve the problems of unmeasured TFT characteristics and inconvenient monitoring of TFT electrical performance, and achieve the effect of facilitating electrical performance and improving quality levels
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[0053] A method for preparing an array substrate, comprising the steps of forming a thin film transistor, a pixel electrode, a common electrode and a passivation layer on the substrate, the step of forming the thin film transistor includes forming an active layer, a gate electrode, a source electrode and a drain electrode step, the passivation layer is formed on the source electrode, the drain electrode and the pixel electrode, and further includes forming a via hole in the passivation layer above the drain electrode, and forming a via hole from the upper surface of the drain electrode through the The step of testing the electrode through the hole and protruding from the surface of the passivation layer.
[0054] In the array substrate and the preparation method, the signal of the pixel electrode or the drain electrode in the inner layer is directly led to the uppermost layer of the sub-pixel unit by opening a via hole in the passivation layer above the drain electrode of the t...
Embodiment 1
[0056] An array substrate, including a substrate and a plurality of sub-pixel units arranged on the substrate, the sub-pixel units include a thin film transistor, a pixel electrode, a common electrode and a passivation layer, and the thin film transistor includes an active layer, a gate electrode , a source electrode and a drain electrode, the drain electrode is electrically connected to the pixel electrode, the passivation layer covers the source electrode, the drain electrode and the pixel electrode, and the sub-pixel unit also includes , and a test electrode exposed on the surface of the sub-pixel unit.
[0057] Such as figure 1 As shown, in the sub-pixel unit, the gate electrode 11 , the active layer 22 , the pixel electrode 31 , the source electrode 42 and the drain electrode 43 , the passivation layer 51 and the common electrode 61 are partially stacked in sequence. Wherein, the region of the passivation layer 51 corresponding to the drain electrode 43 is provided with ...
Embodiment 2
[0106] The difference between this embodiment and Embodiment 1 lies in that the active layer in the sub-pixel unit of the array substrate of this embodiment is formed of a metal oxide semiconductor material.
[0107] In this embodiment, the active layer is formed of indium gallium zinc oxide, indium zinc oxide, and indium gallium tin oxide. Since the active layer is formed of metal oxide semiconductors, the electron mobility between the source electrode and the drain electrode Therefore, the electron mobility between the source electrode and the drain electrode can be better improved.
[0108]In fact, the present invention has no limitation on the material of the active layer in the array substrate. In addition to the amorphous silicon material in Embodiment 1 and the metal oxide semiconductor material in Embodiment 2, materials such as polysilicon are also suitable for the thin film transistor As well as the corresponding array substrates, they will not be listed here.
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