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Method for manufacturing shallow trench isolation structure

An isolation structure and a manufacturing method technology are applied in the manufacturing field of shallow trench isolation structures, which can solve the problems of reducing the isolation effect of shallow trench isolation devices, weakening the planarization effect, and high cost, so as to improve the planarization effect, and solve the problems of depression and depression. Erosion, good isolation effect

Inactive Publication Date: 2013-08-07
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Abstract
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Problems solved by technology

[0005] The traditional production method uses relatively expensive high-selection ratio polishing fluid to grind the silicon dioxide layer for planarization, which is relatively expensive, and an appropriate amount of over-grinding must be added after grinding to the silicon nitride surface to ensure that the silicon nitride surface is free of damage. Silicon oxide remains, resulting in a depression (Disshing) on ​​the silicon oxide surface in the large-area pattern area 103, and an erosion (Erosion) phenomenon in the silicon oxide in the high-density pattern area 104, which weakens the planarization effect and ultimately reduces the shallow trench isolation device. Isolation

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  • Method for manufacturing shallow trench isolation structure
  • Method for manufacturing shallow trench isolation structure
  • Method for manufacturing shallow trench isolation structure

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Embodiment Construction

[0029] In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be further described below in conjunction with the accompanying drawings. Of course, the present invention is not limited to this specific embodiment, and general replacements known to those skilled in the art are also covered within the protection scope of the present invention.

[0030] Secondly, the present invention is described in detail by means of schematic diagrams. When describing the examples of the present invention in detail, for the convenience of illustration, the schematic diagrams are not partially enlarged according to the general scale, which should not be used as a limitation of the present invention.

[0031] The core idea of ​​the present invention is: when the isolation layer is planarized, it does not touch the nitride layer, and the planarization effect can be achieved without using expensive high-selectivity grinding f...

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Abstract

The invention provides a method for manufacturing a shallow trench isolation structure. The method includes sequentially covering an oxide layer and a nitride layer on a semiconductor substrate; carrying out exposure and etching processes to form shallow trench patterns; settling isolation layers and filling the isolation layers in the shallow trench patterns; flattening the isolation layers and reserving parts of the isolation layers; removing remaining parts of the isolation layers by means of dry etching; and removing the nitride layer by means of wet etching. The method for manufacturing the shallow trench isolation structure has the advantages that the nitride layer is unaffected when the isolation layers are flattened, the isolation layers can be flattened by common grinding fluid, the cost of the grinding fluid is reduced, the remaining parts, which are positioned on the nitride layer, of the isolation layers are removed by means of dry etching, and accordingly problems of depression and erosion due to chemical mechanical polishing are solved.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuits and its manufacture, in particular to a method for manufacturing a shallow trench isolation structure. Background technique [0002] In recent years, with the development of semiconductor integrated circuit manufacturing technology, the number of components contained in the chip has been increasing, and the size of the components has been continuously reduced due to the improvement of integration. However, no matter how the device size is reduced, there must still be proper insulation or isolation between the various devices in the chip in order to obtain good device properties. The technology in this area is generally called Device Isolation Technology (Device Isolation Technology). More chip area to accommodate more components. [0003] Among various component isolation technologies, the local silicon oxidation method (LOCOOS) and the shallow trench isolation structure (Shallow...

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Application Information

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IPC IPC(8): H01L21/762
Inventor 张明华严钧华黄耀东方精训彭树根
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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