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Dual-threshold logic unit composed of single-electron transistor and MOS tube

A single-electron transistor and logic unit technology, applied in the field of microelectronics, can solve the problems of difficult realization of CMOS circuits, and achieve the effects of high reconfigurability, high integration and simple structure

Active Publication Date: 2015-08-12
FUZHOU UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, since multi-threshold logic is a nonlinear function, traditional CMOS circuits are usually difficult to implement simply

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  • Dual-threshold logic unit composed of single-electron transistor and MOS tube
  • Dual-threshold logic unit composed of single-electron transistor and MOS tube
  • Dual-threshold logic unit composed of single-electron transistor and MOS tube

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Embodiment Construction

[0024] The invention proposes a design method of a dual-threshold logic unit based on a mixed structure of a single electron transistor and a MOS transistor. As a new type of nano-devices, single-electron transistors can not follow the traditional design method based on Boolean logic, but use threshold logic to design circuits. The logic process of threshold logic is more complicated than that of Boolean logic, and it can realize logic functions more effectively. At the same time, the hybrid structure of SET and MOS tube has unique Coulomb blocking and Coulomb oscillation effects. This unit can realize the logic function of double threshold, has reconfigurable characteristics, and can realize any two-variable logic function.

[0025] The main principle of threshold logic is to calculate the total input value according to the weight of the input, and compare the total input value with the threshold to obtain the output logic. The logic equation to be satisfied by dual-threshol...

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Abstract

The invention relates to a dual-threshold logic unit formed by a single electron transistor and MOS tubes. The dual-threshold logic unit formed by the single electron transistor and the MOS tubes comprises a PMOS tube, an NMOS tube and the single electron transistor, wherein a source electrode of the PMOS tube is connected with a power source Vdd, a grid electrode of the PMOS tube is connected with a reference voltage Vpg, a drain electrode of the PMOS tube is taken as the output end of the dual-threshold logic unit and is connected with a drain electrode of the NMOS tube, a grid electrode of the NMOS tube is connected with a reference voltage Vng, a source electrode of the NMOS tube is connected with a drain electrode of the single electron transistor, a source electrode of the single electron transistor is connected with the ground, a back gate of the single electron transistor is connected with a back gate voltage Vctrl, the single electron transistor comprises four input ends of an input end V1, an input end V2, an input end V3 and an input end V4, and an arbitrary bivariate logic function can be achieved through corresponding arrangement of the V1, the V2, the V3, the V4 and the Vctrl. The dual-threshold logic unit formed by the single electron transistor and the MOS tubes can achieve the logic function of dual-threshold, has a reconfigurable characteristic and can achieve the arbitrary bivariate logic function.

Description

technical field [0001] The invention relates to the technical field of microelectronics, in particular to a double-threshold logic unit composed of a single-electron transistor and a MOS transistor. Background technique [0002] As a neuron output transfer function, threshold logic (Threshold logic) occupies an important position in the research of artificial neural networks. Neuron is the basic unit of neural network, which plays a decisive role in the complexity, scale and robustness of the entire network. Traditional neural networks usually require single-threshold neurons in double-hidden layers to realize arbitrary binary logic functions. As the complexity of the neural network increases, the number of neurons increases significantly, and the size of the entire network increases dramatically. The use of neurons with multiple thresholds can greatly reduce the size and complexity of neural networks. However, since multi-threshold logic is a nonlinear function, traditio...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/20
Inventor 魏榕山陈锦锋于志敏何明华
Owner FUZHOU UNIV