Manufacturing method for semiconductor fin ray and manufacturing method for FinFET device

A manufacturing method and semiconductor technology, which are applied in the manufacturing of semiconductor/solid-state devices, semiconductor devices, electrical components, etc., can solve the problems of rough sides of fins and the inability of fins to be perpendicular to the surface of the substrate.

Active Publication Date: 2013-11-27
浙江海宁经编产业园区开发有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In view of this, an embodiment of the present invention provides a method for manufacturing semiconductor fins with smooth sides and vertical fins to the structure of the ...

Method used

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  • Manufacturing method for semiconductor fin ray and manufacturing method for FinFET device
  • Manufacturing method for semiconductor fin ray and manufacturing method for FinFET device
  • Manufacturing method for semiconductor fin ray and manufacturing method for FinFET device

Examples

Experimental program
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Embodiment 1

[0088] figure 1 It shows a schematic flow chart of the method for manufacturing semiconductor fins according to an embodiment of the present invention. Figures 2a(1) to 2d(2) show the structural schematic diagrams of semiconductor fins at various stages in the production process, where Figure (1) is Top view, Figure (2) is the cross-sectional view of Figure (1) along the AA' direction, combined together figure 1 ~ Figure 2d (2), the process of the manufacturing method of the semiconductor fins is as follows:

[0089] S101 , providing a substrate 11 , as shown in FIGS. 2 a ( 1 ) and 2 a ( 2 ).

[0090] The substrate 11 in Embodiment 1 of the present invention is a bulk silicon substrate. The bulk silicon substrate may be a P-well substrate, an N-well substrate or a double-well substrate.

[0091] S102: Forming a first mask layer 12 in a predetermined area on the substrate 11, as shown in FIGS. 2b(1) and 2b(2).

[0092] The first mask layer 12 can be fabricated by a selectiv...

Embodiment 2

[0107] image 3 A schematic flow chart showing a method for manufacturing semiconductor fins according to an embodiment of the present invention, Figure 4a ~ Figure 4i Schematic diagrams showing the structure of semiconductor fins at various stages in the fabrication process, together with Figure 3 ~ Figure 4i , the process flow of the manufacturing method of the semiconductor fins is as follows:

[0108] In view of the fact that S301-S305 are the same as or corresponding to S101-S105 in the above embodiment, correspondingly, Figure 4a ~ Figure 4e It is the same as or corresponding to FIG. 2 a ( 2 ) to FIG. 2 d ( 2 ), and will not be repeated here. For details, refer to the relevant description in the foregoing embodiments.

[0109] S306, forming side walls 15 on both sides of the fin ray 14, such as Figure 4f shown.

[0110]The sidewalls 15 are formed on both sides of the fin 14 by a combination of deposition and etch-back. For example, one or more layers of material...

Embodiment 3

[0121] Figure 5 It shows a schematic flow chart of the manufacturing method of the FinFET device according to the embodiment of the present invention, wherein the FinFET device adopts the semiconductor fin strips manufactured by the manufacturing method described in the above embodiment. Figures 6a(1)-6l(3) show the Schematic diagram of the structure of FinFET devices at various stages, where Figure (1) is a top view, Figure (2) is a cross-sectional view of Figure (1) along the AA' direction, and Figure (3) is a cross-sectional view of Figure (1) along the BB' direction . combined Figure 5 ~ Figure 6l (3), the process of the manufacturing method of the FinFET device is as follows:

[0122] S501 , providing a substrate 11 , as shown in FIGS. 6 a ( 1 ) and 6 a ( 2 ).

[0123] In the embodiment of the present invention, the substrate 11 is a bulk silicon substrate. The bulk silicon substrate may be a P-well substrate, an N-well substrate or a double-well substrate.

[0124...

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Abstract

The embodiment of the invention discloses a manufacturing method for a semiconductor fin ray and a manufacturing method for a FinFET device. The manufacturing method for the semiconductor fin ray comprises the steps that a substrate is provided, a first mask layer is selectively and epitaxially grown in a preset area above the substrate; a first epitaxial layer is selectively and epitaxially grown on the substrate by taking the first mask layer as a mask; an anisotropic etching method is used for removing the first mask layer and part of the substrate at the bottom of the first mask layer by taking the first epitaxial layer as a mask, and the fin ray is formed at the bottom of the first epitaxial layer. According to the technical scheme, selective epitaxial growth and an anisotropic etching process are combined, photolithography does not need to be adopted, the fact that the surface of the semiconductor fin ray is perpendicular to the surface of a gate oxide layer can be ensured, roughness of the surface of the semiconductor fin ray is lowered, and the fin ray with the smooth side face is formed.

Description

technical field [0001] The invention belongs to the technical field of large-scale integrated circuit manufacturing, and in particular relates to a method for manufacturing semiconductor fins and a method for manufacturing FinFET devices using the same. Background technique [0002] As Moore's Law advances to the 22nm process node, the traditional planar field effect transistor can no longer meet the requirements of low power consumption and high performance. In order to overcome the short-channel effect and increase the driving current density per unit area, three-dimensional fin field-effect transistors (Fin Field-Effect Transistor; FinFET) began to introduce large-scale integrated circuit manufacturing technology. This structure has very outstanding short-channel control capability and high drive current due to more gate control area and narrower channel depletion region. [0003] FinFET is an emerging structure that includes narrow and independent fins with gates on bot...

Claims

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Application Information

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IPC IPC(8): H01L21/28H01L21/336
CPCH01L29/66795H01L21/3081H01L29/7854H01L21/3086H01L29/6653H01L21/02636H01L21/266H01L21/31144H01L29/6681
Inventor 赵静
Owner 浙江海宁经编产业园区开发有限公司
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