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Period signal generation circuit

A technology of periodic signal and generating circuit, which is applied in the direction of information storage, digital memory information, static memory, etc., and can solve the problems of data retention time DRAM device influence and so on

Active Publication Date: 2013-12-04
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Thus, the data retention time will be affected by the internal temperature of the DRAM device

Method used

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  • Period signal generation circuit
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Embodiment Construction

[0023] Embodiments of the present invention will be described below with reference to the accompanying drawings. However, the embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the present invention.

[0024] figure 2 The configuration of a periodic signal generating circuit according to an embodiment of the present invention is explained.

[0025] Such as figure 2 As shown, the periodic signal generation circuit can be configured to include a first reference voltage generator 2, a comparator 3, a driver 4, a temperature sensor 5, a second reference voltage generator 6, a discharge unit 7, a stabilizer 8 and a buffer 9 .

[0026] The first reference voltage generator 2 may generate a first reference voltage signal VREF1 having a first reference voltage of a constant voltage level. The comparator 3 may compare a signal (eg, a voltage signal) generated at the control node ND_CTR with the first reference voltage signal...

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Abstract

A period signal generation circuit includes a first discharger configured to discharge first current having a constant value from a control node in response to a temperature signal; and a second discharger configured to discharge second current varying according to an internal temperature thereof from the control node in response to the temperature signal.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from Korean Patent Application No. 10-2012-0056370 filed with the Korean Intellectual Property Office on May 25, 2012, the entire contents of which are hereby incorporated by reference. Background technique [0003] In general, semiconductor memory devices can be classified as volatile or nonvolatile memory devices. Volatile memory devices lose their stored data when power is interrupted, while non-volatile memory devices retain their stored data even when power is interrupted. Volatile memory devices include dynamic random access memory (dynamic random access memory, DRAM) devices and static random access memory (static random access memory, SRAM) devices. A unit cell of an SRAM device may include a flip-flop circuit (eg, two cross-coupled inverters) and two switching elements. Therefore, SRAM cells can store their data stably as long as they have a power supply. In addition, a unit c...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/406
CPCG11C5/005G11C11/40615G11C7/00G11C11/40626G11C5/147G11C7/04G11C11/4074G11C11/406
Inventor 金东均
Owner SK HYNIX INC