Manufacturing method of chip carrying substrate structure

Abstract

The invention provides a manufacturing method for a chip-bearing substrate structure. The chip-bearing substrate structure includes a metal-substrate-structure manufacturing step, a photoresist-pattern-layer forming step, an etching step, a photoresist-pattern-layer removing step, an insulating-material-layer pressing step, a rubbing step, a circuit-layer manufacturing step and a soldermask-layer manufacturing step. The metal-substrate-structure manufacturing step is to manufacture a multiple-layer structure in which two metal substrate layers are provided with a block layer. In the etching step, an etching depth can be controlled effectively so that each position and each paddle structure formed at each time are identical in shape and depth and the substrate structure can be applied in a mass production process and problems, which exist in the prior art, of skewing, incapability of keeping the position fixed and fall-off, which are resulted from different depths, are solved effectively.

Description

technical field [0001] The invention relates to a method for manufacturing a chip-carrying substrate structure, which mainly uses a barrier layer added on a base to maintain the stability of the production of the bump (Paddle) structure, and makes the chip-carrying substrate less prone to delamination. Background technique [0002] refer to Figure 1A and Figure 1B , are schematic cross-sectional views of the first example and the second example of the structure of the chip carrier substrate in the prior art, respectively. like Figure 1A As shown, the prior art chip carrier substrate structure 100 includes a metal base layer 10, a bump structure (paddle) 15 formed on the metal base layer 10, an insulating material layer 30, a circuit layer 40 and a solder resist layer 60, and the insulating material The layer 30 fills the gap between the bump structure 15 and the metal base layer 10 , but a plane of the bump structure 15 is exposed from the insulating material layer 30 to...

AI Technical Summary

Problems solved by technology

[0006] The feature of the present invention is mainly that the barrier layer is used to control the depth of etching, and wet etching can be precisely controlled, so that the shapes and depths of each bump structure on the same substrate and the bump structures formed in the same way each time are the same, It can be widely used in the mass production process, and effectively solve the problems of offset, unsteady position and delamination caused by different depths in the existing technology

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