Cycle Time to Digital Converter
A digital converter, cycle time technology, applied in analog/digital conversion, code conversion, instruments, etc., can solve the problems of multi-chip area, high requirements for delay cell matching, deterioration of conversion characteristics, etc., to achieve the effect of reducing requirements
Active Publication Date: 2016-05-04
天津海芯光电科技有限公司
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Problems solved by technology
In addition, the TDC of the delay line or the time reduction structure requires a large number of delay units, which not only consumes too much chip area, but also has high requirements for the matching between delay units, and the mismatch between devices will lead to conversion Deterioration of characteristics
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[0030] In order to increase the input range of traditional TDCs, maintain linearity and reduce design requirements in a larger input range. The present invention provides a cycle time digital converter circuit, see the following description for details:
[0031] see figure 1 , The block diagram of the circuit time-to-digital converter implementation includes: multiplexer, D flip-flop, delay unit, phase detector, sub-DTC (digital-to-time converter), readout circuit, time amplifier, NOT gate, and gate Wait.
[0032] CyclicTDC adopts a symmetrical structure, which can obtain an algorithm similar to CyclicADC and eliminate matching errors to obtain good linearity. A multiplexer selects the initial time signal and the residual signal. The PD phase detector compares the phase difference between In1 and In1 after passing through the delay unit. The result of the comparison is used as DTC input for further conversion.
[0033] For the schematic circuit diagram of DTC see image ...
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The invention relates to the field of analog integrated circuit design of microelectronics, and provides a cyclic time to digital convertor (Cyclic TDC) in order to further expand an input range of the traditional TDC, allow the TDC to maintain the linear characteristic in a larger input range, and reduce a design matching requirement. The cyclic TDC adopts the technical scheme that a difference value of two input time signals is converted into corresponding digital codes by a sub TDC; a time margin obtained by conversion of the sub TDC is amplified by a time 2* magnifier; the amplified time margin enters the sub TDC for quantization through a multiplexer; a cyclic conversion process is performed to the required precision; the converted digital codes are subjected to dislocation addition by a reading circuit; and the obtained final digital code is output by the reading circuit, so that the conversion from the time signals to the digital codes is accomplished. The cyclic TDC is mainly applied to the analog integrated circuit design.
Description
technical field [0001] The invention relates to the field of analog integrated circuit design of microelectronics, in particular to a Cyclic Time-to-Digital Converter (CyclicTDC). technical background [0002] Time-to-digital converters (Time to digital converter, TDC) are widely used in many applications, such as phase and frequency detection in digital / analog phase-locked loops. In recent research, TDC is applied in time-domain based ADC to realize the conversion of time quantity to digital quantity. Existing TDC types include counter structure, delay line structure, time reduction structure and Vernier structure and so on. [0003] Above-mentioned technology has following shortcoming and deficiency at least: [0004] The input range of traditional time-to-digital converters is only tens to hundreds of picoseconds, because only in this range can the linear conversion output of the TDC structure be guaranteed. In addition, the TDC of the delay line or the time reduction ...
Claims
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IPC IPC(8): H03M1/50
Inventor 徐江涛朱昆昆高静史再峰姚素英
Owner 天津海芯光电科技有限公司