Phase change memory array stacked structure and operating method thereof

Abstract

The invention provides a phase change memory array stacked structure and an operating method thereof. The phase change memory array stacked structure at least comprises multiple phase change memory blocks, a global bit line, local bit lines, block bit lines, first strobe gates and second strobe gates, wherein each phase change memory block comprises at least four columns of phase change resistors; the phase change resistors in each column are respectively correspondingly connected with a block bit line; at least two block bit lines are respectively connected with a second strobe gate; at least two second strobe gates are connected to the same local bit line; at least two local bit lines are connected to the global bit line through a first strobe gate. According to the phase change memory array stacked structure, all the block bit lines are connected together in a unified mode through the global bit line, and the maximum load of the global bit line is only determined by the lengths of the block bit lines in the memory blocks, so that parasitic capacitance is greatly reduced. Therefore, large signal delay and high power consumption generated in a high-capacity phase change memory are avoided.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a phase-change memory array stack structure and an operation method thereof. Background technique [0002] Phase Change Memory (PCM, PCRAM) generally refers to random access memory based on a certain chalcogenide thin film. It is a new type of non-volatile memory, which is considered to be the most likely to replace flash memory (Flash) and become the mainstream non-volatile memory in the near future. This is due to its low operating voltage, fast reading speed, bit operation, writing and erasing speed much faster than flash memory, and better fatigue characteristics, which can achieve hundreds of millions of cycles of writing and erasing. The manufacturing process is simple and mature. The CMOS process is compatible, so that its memory cells can be easily scaled down to smaller sizes. [0003] A single phase-change memory cell generally consists of a phase-change resist...

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Problems solved by technology

[0009] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a phase-change memory array stack structure and its operation method, which are used to solve the problem of increasing the proportion of the area occupied by the memory array in the memory in the prior art, thereby reducing the The problem of chip cost

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