Cascode circuit

Abstract

A cascode circuit arrangement has a low voltage MOSFET and a depletion mode power device mounted on a substrate (for example a ceramic substrate), which can then be placed in a semiconductor package. This enables inductances to be reduced, and can enable a three terminal packages to be used if desired.

Description

technical field [0001] The present invention relates to cascaded semiconductor devices. In particular, the invention relates to depletion mode transistors, eg high electron mobility transistors or junction gate field effect transistors. Examples are gallium nitride (GaN) transistors (eg GaN high electron mobility transistors (HEMTs)) or silicon carbide (SiC) field effect transistors. Background technique [0002] The present invention is particularly concerned with GaN power transistors. The base GaN power semiconductor is a depletion mode (normally on) device due to the presence of built-in heterojunctions created during the growth of the GaN wafer. This creates thin regions of high conductivity in the material, called two-dimensional electron gas ("2DEG"), that effectively define the transistor channel. [0003] In order to make a normally-off GaN device, a means of disturbing the 2DEG to prevent it from being turned on is required. Attempts have been made to introduce...

AI Technical Summary

Problems solved by technology

[0020] Another problem with the basic cascode circuit described above (i.e., without additional components) is that it is designed as a three-terminal circuit to connect to the source, drain and gate terminals in an external circuit

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