Method for manufacturing transistor

Abstract

The invention provides a method for manufacturing a transistor. The method comprises the steps of providing a substrate, wherein a false gate structure is formed on the substrate, the false gate structure comprises a gate dielectric layer, a protective layer located on the gate dielectric layer, an oxide layer located on the protective layer and a false gate located on the oxide layer, the gate dielectric layer is made of oxygen containing materials, and oxygen diffuses to the upper surface of the protective layer, so that an oxidation layer is formed; forming the source electrode and the drain electrode of the transistor after the false gate structure is formed; forming an interlayer dielectric layer on the substrate after the source electrode and the drain electrode are formed, wherein the upper surface of the false gate structure is exposed through the interlayer dielectric layer; eliminating the false gate, wherein a false gate trench is formed in the interlayer dielectric layer; eliminating the oxide layer and the oxidation layer after the false gate trench is formed; forming a gate electrode in the false gate trench after the oxide layer and the oxidation layer are eliminated. By the adoption of the method for manufacturing the transistor, the transistor can obtain an even threshold voltage, and therefore the performance of the transistor is improved.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, in particular to a method for manufacturing a transistor. Background technique [0002] With the continuous reduction of complementary metal oxide semiconductor (CMOS) size, the traditional SiO2 as gate dielectric can no longer meet the needs of the rapid development of integrated circuits. When the thickness of the SiO2 gate dielectric is below 10nm, problems such as tunneling current, vacuum defects, poor reliability, and performance failure will occur, and the leakage current and power consumption will rise sharply. If it cannot be solved well, the power consumption will increase accordingly. Moreover, due to the appearance of the short channel effect, the threshold voltage of the CMOS transistor will be lowered, and the threshold voltage will be unstable. To solve these problems, novel high-k metal gate transistors have been extensively studied and applied. Compared with the tradi...

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Problems solved by technology

[0010] The technical problem to be solved by the present invention is that the threshold voltage of the high-k metal gate transistor formed in the prior art is not uniform

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