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VDMOS structure

An N-type, epitaxial technology, which is applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve the problems of reducing the avalanche breakdown resistance of the product and the reverse breakdown of the MOS tube, so as to reduce the avalanche breakdown resistance and reduce the switch Effect of delay, reduction of switching time

Inactive Publication Date: 2014-07-09
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The opening of the emitter and base of the triode will cause self-feedback of the collector current of the parasitic transistor and the leakage from the body region to the source region of the MOS transistor, resulting in reverse breakdown of the MOS transistor and reducing the avalanche breakdown resistance of the product. ability

Method used

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Examples

Experimental program
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Embodiment Construction

[0030] Such as image 3 , Figure 4 As shown, the first embodiment of the VDMOS structure of the present invention includes an N-type epitaxy 2 on an N-type substrate 1, a P well 3 on the top of the N-type epitaxy 2, and a gate oxide layer located above the P well 3 and the N-type epitaxy 2. film 6, the polysilicon planar gate 7 located above the gate oxide film 6, wherein a groove 10 is formed on the upper part of the P well 3, and a metal silicide 5 in contact with the gate oxide film 6 is formed in the groove 10, and a contact hole 9 is formed Above the metal silicide 5; wherein, the depth A-A of the groove 10 is 1000 angstroms to 3000 angstroms, preferably 1500 angstroms, 2000 angstroms and 2500 angstroms, and the depth A-A of the groove 10 is greater than that of the metal silicide 5 Thickness B-B.

[0031] Such as Figure 5 , Figure 6 As shown, the second embodiment of the VDMOS structure of the present invention includes an N-type epitaxy 2 on an N-type substrate 1...

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Abstract

The invention discloses a VDMOS structure. The VDMOS structure comprises an N type epitaxial portion on an N type substrate, a P trap on the upper portion of the N type epitaxial portion, a grid oxidation film located above the P trap and the N type epitaxial portion, and a polycrystalline silicon plane grid located above the grid oxidation film, wherein a groove is formed in the upper portion of the P trap, metal silicide making contact with the grid oxidation film is formed in the groove, and a contact hole is formed in the upper face of the metal silicide. The VDMOS structure is provided with NPN triodes without parasitism, and the avalanche breakdown resistance of the VDMOS structure can be improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a VDMOS (vertical double-diffused metal-oxide semiconductor field-effect transistor) structure. Background technique [0002] Current power devices are mostly used in inductive inductive AC circuits, so the avalanche withstand (EAS) when the product is switched is a major indicator for product performance evaluation. The greater the ability to withstand avalanche breakdown, the stronger the stability and reliability of the product. [0003] Due to the structural characteristics of the MOS tube of the power device, the implanted impurities in the source region of the N tube need to be N-type, and the N tube needs to be formed by forming a P well on the N epitaxy, so the N implant region, the P well and the N epitaxy will form a The parasitic NPN triode, the opening of this parasitic triode will greatly reduce the tolerance of the P well to the avalanche breakdown of the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/423
CPCH01L29/7802H01L29/0611
Inventor 王飞
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP