Method for manufacturing semiconductor device
A device manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve problems such as inability to large-scale integration, inability to narrow the width of nanobelts, rough edges, etc., and achieve smooth edges and line widths. Narrow, simple process effect
Inactive Publication Date: 2014-08-06
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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[0007] In view of the problems existing in the preparation of graphene nanoribbons at present, such as the width of nanoribbons cannot be narrowed, the edges are rough, and large-scale integration cannot be achieved, etc., the present invention proposes a structure and manufacturing process
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[0029] Hereinafter, the present invention is described by means of specific embodiments shown in the drawings. It should be understood, however, that these descriptions are exemplary only and are not intended to limit the scope of the present invention. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concept of the present invention.
[0030] First of all, the present invention provides a method for manufacturing a semiconductor device, which uses a double-patterned sidewall mask technology to form graphene nanobelts. For the manufacturing process, see the appended Figure 1-6 .
[0031] First, see attached figure 1 , providing a substrate 1 . The substrate 1 in the present invention can be a substrate processed by at least one process, and can be bulk silicon, silicon germanium, glass, etc. The selection of the specific material depends on the structure and type of the device to be ma...
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Abstract
The invention provides a method for manufacturing a semiconductor device. According to the method for manufacturing the graphene device, on the basis of the process of double patterning of a side wall, a hard mask pattern is manufactured through the process for manufacturing the side wall in a traditional transistor, and the method has the advantages that the processes are simple, the line width is small, the edge is smooth, and the processes are compatible with the CMOS process. Meanwhile, the advanced deposition technology is used, and therefore graphene can be made into a graphene nanobelt with the width being below 10 nm or even 5 nm, wherein the edge of the graphene nanobelt is smooth; thus, a sufficient energy gap is formed, so that the graphene device has a sufficient on-off ratio at room temperature.
Description
technical field [0001] The invention relates to the field of semiconductor device manufacturing methods, in particular to a method for manufacturing graphene nanoribbon devices based on sidewall double patterning. Background technique [0002] Since the first transistor was invented, integrated circuits have been advancing at breakneck speed, fueled by a series of innovative efforts. Today, the feature size of silicon-based integrated circuits has dropped to 22nm, and a lot of progress has been made in 16nm and 14nm node technologies. However, how to continue to promote the development of integrated circuits in a high-speed development mode has become a problem that has to be considered. In recent years, new materials, new processes, and new devices have emerged continuously, especially new materials have received more widespread attention. What kind of materials can occupy new heights in the post-silicon era has become a research hotspot for scientists from all over the wo...
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Login to View More IPC IPC(8): H01L21/336H01L29/786B82Y10/00
CPCH01L29/66045B82Y10/00H01L29/1606H01L29/78684
Inventor 贾昆鹏朱慧珑
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI