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Sigma-delta analog-to-digital converter adopting two-step process and hardware multiplexing

An analog-to-digital converter and hardware multiplexing technology, which is applied in the design and circuit implementation of analog-to-digital converters, and in the field of sigma-delta analog-to-digital converters, can solve problems such as precision limitations and high-precision difficulties, and achieve reduced conversion time, Effect of increasing circuit area and power consumption, saving area and power consumption

Inactive Publication Date: 2014-08-13
TIANJIN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Circular ADC and pipeline ADC are faster ADCs, but their accuracy is limited because they depend on the matching degree of devices in integrated circuits. high demands
Because of the above limitations, they have encountered great difficulties in the realization of high precision, especially the precision above 12 bits

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  • Sigma-delta analog-to-digital converter adopting two-step process and hardware multiplexing
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  • Sigma-delta analog-to-digital converter adopting two-step process and hardware multiplexing

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Embodiment Construction

[0017] The present invention proposes a two-step conversion scheme, that is, a sigma-delta analog-to-digital converter is first used to obtain high-bit precision, and then the quantization error is converted by a loop-type analog-to-digital converter to obtain low-bit precision. Adopting this method can reduce the conversion accuracy of the sigma-delta analog-to-digital converter, thereby greatly improving the conversion speed of the analog-to-digital converter. On the other hand, taking advantage of the similar structure characteristics of sigma-delta analog-to-digital converters and circular analog-to-digital converters, hardware multiplexing can be used, that is, the same part of the circuit is used to implement sigma-delta analog-to-digital conversion with different timing and switch control. And loop-type analog-to-digital conversion, so that no additional circuits are introduced, thereby reducing area and power consumption.

[0018] The invention proposes a sigma-delta a...

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Abstract

The invention relates to the field of digital-analog hybrid integrated circuit design. In order to reducing the conversion time required by a high-accuracy sigma-delta analog-to-digital converter without greatly increasing the area and the power consumption and without increasing the analog circuit accuracy and matching degree requirements at the same time. Thus, the invention adopts the following technical scheme that a sigma-delta analog-to-digital converter adopting two-step process and hardware multiplexing is disclosed, the sigma-delta analog-to-digital converter comprises a switched capacitor integrator, a 1.5-bit analog-to-digital converter, a 1.5-bit digital-to-analog converter, an adder, a multiplexer, a register and a counter; the multiplexer comprises a linked switch S1 and a linked switch S3, an input signal is outputted by the linked switch S1, the adder, the switched capacitor integrator, the 1.5-bit analog-to-digital converter, the linked switch S1, the counter and another adder successively. The sigma-delta analog-to-digital converter of the invention is mainly used in digital-analog hybrid integrated circuits.

Description

technical field [0001] The invention relates to the field of digital-analog hybrid integrated circuit design, in particular to the design and circuit realization of an analog-to-digital converter. Specifically, it relates to a sigma-delta analog-to-digital converter using two-step processing and hardware multiplexing. technical background [0002] Where a high-precision analog-to-digital converter is required, a sigma-delta analog-to-digital converter is usually used, which is an oversampling analog-to-digital converter. Its advantage is that it has lower requirements for circuit matching and analog circuit indicators, but because its sampling frequency is much higher than that of the Nyquist sampling rate analog-to-digital converter, it is slower, so the sigma-delta analog-to-digital converter Commonly used for low-speed (usually lower than audio) high-precision analog-to-digital conversion. To achieve 10-bit accuracy using a 1st-order sigma-delta ADC requires at least 2 ...

Claims

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Application Information

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IPC IPC(8): H03M1/12
Inventor 高静杨柳姚素英史再峰徐江涛
Owner TIANJIN UNIV