SAR parallel processing method and device based on high-performance bw100 chip
A parallel processing, high-performance technology, applied in the direction of electrical digital data processing, instruments, computers, etc., can solve the problems of inconvenient multi-processor cooperative processing of SAR data, data communication and unbalanced computing power, etc., to achieve superior overall performance, The effect of strong parallel computing ability and strong data communication ability
A parallel processing, high-performance technology, applied in the direction of electrical digital data processing, instruments, computers, etc., can solve the problems of inconvenient multi-processor cooperative processing of SAR data, data communication and unbalanced computing power, etc., to achieve superior overall performance, The effect of strong parallel computing ability and strong data communication ability
CN104035913BActive Publication Date: 2017-04-19CHINA ELECTRONIC TECH GRP CORP NO 38 RES INST
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[0029]The SAR parallel processing method based on the high-performance BW100 chip includes that the FPGA controller 1 sends the echo data ping-pong to the main BW100 chip and the slave BW100 chip for processing, and the master BW100 chip and the slave BW100 chip transfer the processing results to the ping-pong QDRII memory. The DDR3 memory attached to the FPGA controller 1 completes the echo input and distance processing; then, the ping-pong QDRII memory fetches the azimuth data from the DDR3 memory and sends it to the main BW100 chip through the FPGA controller 1 ping-pong, and the slave BW100 chip processes it. And ping-pong receives the processing results of the main BW100 chip and the slave BW100 chip, and completes the imaging azimuth processing; after completing multiple distance and azimuth processing, finally completes the entire imaging processing, as shown in figure 1 shown.
[0030] Such as figure 1 , 2 As shown in , 4, the processing of the echo number and distan...
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The invention relates to a high-performance BW100 chip based SAR (Synthetic Aperture Radar) parallel processing method. The method comprises the following steps: an echo datum is transmitted by an FPGA (Field Programmable Gate Array) controller in a ping-pong manner and then is processed by a master BW100 chip and a slave BW100 chip, the processing result is transferred to a DDR3 (double data rate) memory through a ping-pong QDRII (quad data rate) memory to finish processing the echo number and the distance vector; the ping-pong QDRII memory takes the direction vector data from the DDR3 memory, transmits the data in a ping-pong manner to the master BW100 chip and the slave BW100 chip through the FPGA controller to process the data, and receives the processing result in a ping-pong manner, so as to finishing processing an imaging direction vector; after the distance vector and the direction vector are processed for multiple times, the whole imaging processing is completed. The invention further discloses a high-performance BW100 chip based SAR parallel processing device. The BW100 chip is taken as an SAR imaging processing core processor, and the device has the advantages of strong parallel processing capability and data communication capability and excellent overall performances, and is suitable for the SAR real-time imaging processing field.
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technical field [0001] The invention relates to the technical field of SAR real-time imaging processing, in particular to a SAR parallel processing method and device based on a high-performance BW100 chip. Background technique [0002] The new high-resolution SAR radar puts forward high requirements on the performance of the real-time imaging processing system. Under the requirement of localization, it is of great significance to adopt a high-performance processor with independent property rights. [0003] SAR real-time imaging processing has the characteristics of large amount of calculation and large amount of data. At present, the industry mostly chooses TS201 of AD Company and TMS320C6678 of TI as the core processing chips. The peak computing capability of TS201 is 3.6GFlops; 128Gflops, the processing capability of TMS320C6678 is only 5-6 times that of TS201 from the perspective of use. The main reason for the decline in the actual performance of TMS320C6678 is that ther...
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Patent Timeline
19 Apr 2017
Publication
CN104035913B
- IPC
- G06F15/167
- Inventors
- 孙晓晖; 孙家敬