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Hard mask laminated structure and fabrication method thereof

A technology of a stacked structure and a manufacturing method, which is applied in the manufacturing of semiconductor/solid-state devices, electrical components, circuits, etc., can solve problems such as unfavorable deposition and overhang structure, and achieve the effect of improving quality, simple process and avoiding holes.

Active Publication Date: 2014-10-22
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a hard mask laminated structure and a manufacturing method thereof, which are used to solve the problem of using orthoethyl silicate hard film in the hard mask structure of the prior art. Layer HMTEOS, it is easy to form an overhang structure during the etching process, which is not conducive to the subsequent deposition and other processes

Method used

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  • Hard mask laminated structure and fabrication method thereof
  • Hard mask laminated structure and fabrication method thereof
  • Hard mask laminated structure and fabrication method thereof

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Embodiment Construction

[0037] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0038] see Figure 2 to Figure 7 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arb...

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Abstract

The invention provides a hard mask laminated structure and a fabrication method thereof. The hard mask laminated structure comprises: a low-kappa medium hard film layer which is bonded onto the surface of a substrate; a fluorine and silicone glass layer which is bonded onto the surface of the low-kappa medium hard film layer; a metal hard film layer which is bonded onto the surface of the fluorine and silicone glass layer; and a shielding oxide layer which is bonded onto the surface of the metal hard film layer. According to the invention, the traditional tetraethoxysilane hard film layer HMTEOS is replaced with the fluorine and silicone glass layer, so the defect that the etching rate of the tetraethoxysilane hard film layer is slow compared with the low-kappa dielectric layer so as to form a overhanging structure can be overcome, and the generation of holes in the subsequent deposition process can be avoided, so that the deposition quality can be greatly improved, and the device stability and performance can be improved. According to the invention, the process is simple, so the structure and the method is suitable for being used in industry production.

Description

technical field [0001] The invention relates to a semiconductor structure and a manufacturing method thereof, in particular to a hard mask stack structure and a manufacturing method thereof. Background technique [0002] As the integration of semiconductor devices continues to increase and the associated critical dimensions continue to decrease, the size of the vias in the interconnection (contact) and metal layer (metal) in the copper back-end interconnection process is also getting smaller and smaller. However, the aspect ratio remains the same or becomes larger, which makes the subsequent interconnection process more and more difficult. Especially in the process of 65nm and below, with the reduction of the thickness of the photoresist, the process difficulty of etching the via hole with only the photoresist as the barrier layer is getting higher and higher. [0003] Therefore, a hard mask layer (Metal hard mask) is introduced to increase the selectivity ratio between the...

Claims

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Application Information

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IPC IPC(8): H01L21/768
CPCH01L21/76898
Inventor 周鸣
Owner SEMICON MFG INT (SHANGHAI) CORP
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