Unlock instant, AI-driven research and patent intelligence for your innovation.

A method for manufacturing a silicon heterojunction solar cell

A solar cell and silicon heterojunction technology, applied in the field of solar energy, can solve problems such as narrow process window, complex process, and difficult stable control

Active Publication Date: 2018-10-23
ENN SOLAR ENERGY
View PDF5 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the current process window for improving a-Si:H / c-Si interface passivation is relatively narrow, and there are problems that the process is complicated or difficult to control stably

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A method for manufacturing a silicon heterojunction solar cell
  • A method for manufacturing a silicon heterojunction solar cell
  • A method for manufacturing a silicon heterojunction solar cell

Examples

Experimental program
Comparison scheme
Effect test

example 1

[0054] Example 1: Test the minority carrier lifetime and open circuit voltage after fabricating the i / c-Si / i structure, such as figure 2 As shown, it specifically includes the following steps:

[0055] S201. Perform texturing treatment on monocrystalline silicon wafers; in specific implementation, an N-type monocrystalline silicon wafer with a thickness of 195 μm and a resistivity of 1-5Ω·cm can be selected, soaked in 1.2wt% NaOH, 0.8wt% Na 2 SiO 3 In a mixed solution composed of 8vol% IPA, after being treated at 80° C. for 40 minutes, rinse with deionized water (DI water) for 5 minutes to 10 minutes.

[0056] S202. Cleaning the monocrystalline silicon wafers after the texturing treatment; in practice, the cleaning treatment may include three steps: (1) SC1 cleaning, putting the monocrystalline silicon wafers into NH 3 ·H 2 O:H 2 o 2 :H 2 O in a mixed solution with a ratio of 1:1:5, soak at 75°C for 15 minutes, then rinse with DI water for 5 to 10 minutes; (2) SC2 clea...

example 2

[0065] Example 2: Test the open circuit voltage after making a ni / c-Si / ip structure heterojunction battery, such as image 3 As shown, it specifically includes the following steps:

[0066] S301. Perform texturing treatment on monocrystalline silicon wafers; in specific implementation, an N-type monocrystalline silicon wafer with a thickness of 195 μm and a resistivity of 1-5Ω·cm can be selected, soaked in 1.2wt% NaOH, 0.8wt% Na 2 SiO 3 In a mixed solution composed of 8vol% IPA, after being treated at 80° C. for 40 minutes, rinse with deionized water (DI water) for 5 minutes to 10 minutes.

[0067] S302. Cleaning the monocrystalline silicon wafers after the texturing treatment; in specific implementation, the cleaning treatment may include three steps: (1) SC1 cleaning, putting the monocrystalline silicon wafers into NH 3 ·H 2 O:H 2 o 2 :H 2 O in a mixed solution with a ratio of 1:1:5, soak at 75°C for 15 minutes, then rinse with DI water for 5 to 10 minutes; (2) SC2 cl...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
electrical resistivityaaaaaaaaaa
open-circuit voltageaaaaaaaaaa
Login to View More

Abstract

The invention discloses a method for manufacturing a silicon heterojunction solar cell. A first intrinsic layer of amorphous silicon is deposited on one side of a monocrystalline silicon wafer by using a first temperature; and a first intrinsic layer of amorphous silicon is deposited on the other side of a single crystal silicon wafer by using the first temperature. The second intrinsic layer of amorphous silicon; the single crystal silicon wafer deposited with the first intrinsic layer of amorphous silicon and the second intrinsic layer of amorphous silicon is annealed at a second temperature; wherein, the second temperature is greater than the first temperature. Due to the combination of depositing the first intrinsic layer of amorphous silicon and the second intrinsic layer of amorphous silicon at a lower first temperature and annealing the heterojunction at a higher second temperature, it can be seen from the test data that , can make the a-Si:H / c-Si interface in the silicon heterojunction solar cell to obtain a better passivation effect, which is conducive to obtaining a longer minority carrier lifetime, thereby increasing the open circuit voltage of the silicon heterojunction solar cell, Enhancing the performance of silicon heterojunction solar cells.

Description

technical field [0001] The invention relates to the technical field of solar energy, in particular to a method for manufacturing a silicon heterojunction solar cell. Background technique [0002] With the increasing energy crisis and environmental pollution, people pay more attention to the research and application development of new energy. Among them, solar photovoltaic power generation technology has become a research hotspot in the field of new energy due to its cleanliness, safety and renewability. Among them, silicon heterojunction solar cells have become an important development direction of the current solar energy industry due to their advantages such as low preparation process temperature, high photoelectric conversion efficiency, excellent high temperature / weak light power generation and low attenuation. [0003] Silicon heterojunction solar cells generally include a single crystal silicon substrate, an intrinsic layer of amorphous silicon located on both sides o...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L31/20
CPCH01L31/202Y02E10/50Y02P70/50
Inventor 田小让王进谷士斌张林杨荣李立伟孟原郭铁
Owner ENN SOLAR ENERGY