Grid line electrode structure of back surface of single crystalline silicon solar cell and single crystalline silicon solar cell
A solar cell and back surface technology, applied in the field of solar cells, can solve the problems of large usage of silver paste and large back compounding, and achieve the effects of reducing usage, reducing back compounding, and improving photoelectric conversion efficiency
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0030] Such as Figure 1-4 As shown in , the grid line electrode structure on the back surface of the monocrystalline silicon solar cell provided in this embodiment uses a silicon wafer of 156 mm×156 mm with rounded chamfered n-type single crystal silicon wafers, including The p-type emitter 401 and the n-type back field 402 on the surface, the p-type emitter 401 and the n-type back field 402 are alternately distributed and not in contact with each other, and also include the p-type emitter main gate electrode 101, the n-type back field main gate The electrode 102, the p-type emitter fine grid electrode 201 and the n-type back field fine grid electrode 202, wherein the p-type emitter fine grid electrode 201 is located on the p-type emitter 401, and the n-type back field fine grid electrode 202 is located on the n-type back surface On the field 402, the p-type emitter fine grid electrode 201 is connected to the p-type emitter main gate electrode 101, the n-type back field fine ...
Embodiment 2
[0039] Such as Figure 5 As shown in a, the gate line electrode structure on the back surface of the monocrystalline silicon solar cell provided in this embodiment adopts a 4 mm×4 mm square n-type single crystal silicon wafer, including The p-type emitter and the n-type back field, the p-type emitter and the n-type back field are distributed alternately and do not touch each other, and also include the p-type emitter main gate electrode, the n-type back field main gate electrode, the p-type emitter fine The gate electrode and the n-type back field fine grid electrode, wherein the p-type emitter fine grid electrode is located on the p-type emitter, the n-type back field fine grid electrode is located on the n-type back field, and the p-type emitter fine grid electrode is connected to the p-type The emitter main grid electrode is connected, the n-type back field fine grid electrode is connected to the n-type back field main grid electrode, and each p-type emitter fine grid elect...
Embodiment 3
[0051] The difference from Embodiment 1 is that in this implementation, each p-type emitter fine grid electrode is composed of five parallel and evenly distributed thin grids, and the ends of the five parallel and uniformly distributed thin grids are connected by a thin grid.
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 