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Gate stack for normally-off compound semiconductor transistor

A gate stack, compound technology, used in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as threshold voltage instability

Active Publication Date: 2014-12-24
INFINEON TECH AUSTRIA AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] However, unlike conventional silicon technologies, the doping of large bandgap materials such as GaN is not trivial
In practice, the fabrication of thin p-type doped GaN layers requires very complex processing
Moreover, threshold voltage instability can arise due to non-uniform doping of the GaN layer, and especially due to surface accumulation of p-type dopant elements at the exposed GaN surface
Furthermore, the maximum gate voltage that can be tolerated by the device is limited by the presence of a pn junction below the gate electrode

Method used

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  • Gate stack for normally-off compound semiconductor transistor
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  • Gate stack for normally-off compound semiconductor transistor

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Embodiment Construction

[0016] According to some embodiments described herein, there is provided a compound semiconductor transistor having a conduction channel inversion region that automatically appears in a heterostructure due to the piezoelectric effect. Also due to the piezoelectric effect, the compound semiconductor transistor is normally off by creating a second inversion region of opposite polarity to the channel region. The second inversion region reversely balances the polarized charge in the channel inversion region so that the channel region is destroyed beneath the gate stack of the transistor. For example, in the case of an nMOS-type GaN HEMT having an electron gas inversion region as a channel, a hole gas inversion region is formed in the heterostructure below the gate stack or in the gate stack by the piezoelectric effect, To deplete the channel in the heterostructure region below the gate stack and achieve a normally-off device. By reversing the polarity of the two inversion layers,...

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Abstract

The embodiment of the invention discloses a gate stack for normally-off compound semiconductor transistor. The normally-off compound semiconductor transistor includes a heterostructure body and a gate stack on the heterostructure body. The heterostructure body includes a source, a drain spaced apart from the source, and a channel for connecting the source and the drain. The channel includes a first two-dimensional charge carrier gas of a first polarity arising in the heterostructure body due to piezoelectric effects. The gate stack controls the channel in a region of the heterostructure body under the gate stack. The gate stack includes at least one III-nitride material which gives rise to a second two-dimensional charge carrier gas of a second polarity opposite the first polarity in the gate stack or in the heterostructure body under the gate stack due to piezoelectric effects. The second two-dimensional charge carrier gas counter-balances polarization charges in the first two-dimensional charge carrier gas so that the channel is disrupted under the gate stack.

Description

technical field [0001] This application relates to compound semiconductor transistors, and more particularly to normally-off III-nitride-based transistors. Background technique [0002] Conventional HEMTs (High Electron Mobility Transistors) are typically fabricated in GaN technology and are often characterized by negative threshold voltages. That is, current flows between the source and drain terminals of the device even when no voltage is applied to the gate electrode to turn on the transistor. In fact, in GaN technology, a thin channel (inversion layer) is created automatically, without applying any voltage to the gate electrode, via strain and polarization effects between the source and drain terminals. As such, the device is often referred to as normally open. [0003] The normally-on characteristic of HEMTs is an intrinsic property of GaN technology and limits the range of applications of GaN technology to those applications where a power supply can be used to genera...

Claims

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Application Information

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IPC IPC(8): H01L29/778H01L29/423H01L29/06H01L21/335H01L21/28
CPCH01L29/2003H01L29/205H01L29/66431H01L29/7783H01L29/432H01L29/66462H01L29/7786
Inventor G·库拉托拉
Owner INFINEON TECH AUSTRIA AG