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Electrode structure, constituent material and manufacturing method thereof

An electrode material, a technology of embedding electrodes, applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve problems such as application obstacles

Inactive Publication Date: 2015-02-04
ZYCUBE
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Considering the adverse effects of part of the processing process on the original planar circuit of the device wafer, the loading and unloading of auxiliary materials (such as supporting glass substrates), and other factors, from the perspective of the overall process flow, there are major obstacles to the application

Method used

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  • Electrode structure, constituent material and manufacturing method thereof
  • Electrode structure, constituent material and manufacturing method thereof
  • Electrode structure, constituent material and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0123] Fig. 1A and Fig. 1B are process flow diagrams of Embodiment 1 of the present invention. This embodiment is a case in which a device connecting both sides of the substrate or a terminal of planar wiring is exposed on both sides of the substrate (interposer).

[0124] FIG. 1A( a ) is a partially enlarged view of the prepared substrate 50 .

[0125] FIG. 1A( b ) is a partially enlarged view after the through-hole 51 is formed in the substrate 50 . The through hole 51 penetrates from the first main surface 52 (the upper surface in the figure) to the second main surface 53 (the lower surface in the figure) of the substrate 50 . The inner diameter of the through hole 51 ranges from several μm to several 100 μm.

[0126] FIG. 1A(c) is a partially enlarged view after an insulating layer 54 is formed on the inner wall of the through hole 51 . Depending on the formation process of the insulating layer, the insulating layer 54 may also extend to the first main surface 52 and th...

Embodiment 2

[0147] 2A and 2B are schematic process flow diagrams of Embodiment 2 of the present invention. In this embodiment, one end of the through electrode is exposed on one side of the substrate as a connection terminal, and the other end is connected to the embedded electrode of the internal wiring on the reverse side of the substrate. Since they are conceptually the same, the second embodiment is also included in the present invention.

[0148] FIG. 2A( a ) is a schematic cross-sectional view of a substrate 250 made of semiconductor wafers. The transistor 70 is provided on the second main surface 253 (the lower surface in the drawing) of the substrate 250 . The transistor 70 is composed of a diffusion layer 71 , a gate electrode 72 , and a wiring layer 73 for pulling out the potential of the diffusion layer 71 . The wiring layer 73 is arranged in the insulating layer 74 (oxide film) together with the gate electrode 72 .

[0149] FIG. 2A(b) schematically shows the opening 251 for...

Embodiment 3

[0161] image 3 The process flow of the through electrode according to the third embodiment of the present invention is shown. This embodiment is the multilayer wiring board of the second embodiment. therefore, image 3 with the second embodiment of the present invention Figure 2A and Figure 2B are mostly the same.

[0162] image 3 (a) schematically shows a substrate 250 of a semiconductor wafer. On the side of the second main plane 253 of the substrate 250, the insulating layer 74 has multiple wiring layers 73a, 73b, and 73c. Interlayer lines 270 are provided between these wiring layers. Such multilayer wiring and interlayer wiring are commonly used in semiconductor wafers.

[0163] image 3 (b) is a schematic diagram of the opening 251b reaching the second wiring layer 73b. Thereafter, as in the second embodiment described above, through electrodes are formed in the openings 251b.

[0164] image 3 Only the opening of the second wiring layer 73b is illustrated...

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Abstract

The invention relates to an electrode structure, a constituent material and a manufacturing method thereof. The invention provides a structure of a through or embedded electrode which can be configured in a more condense manner and has low resistance and high reliability along with fine development of semiconductor manufacturing technology, a material component; and a low-cost process flow for the electrode. The manufacturing method comprises steps of filling coating paste of a first conductive material which is obtained through mixing more than two kinds of conductive particles of metal surface coating layers with different melting points in holes of a substrate and drying; and performing low-temperature thermal treatment on the substrate in which the openings are filled by the coating paste of the first conductive material, and sintering the solid phase of the first conductive material to a porous first conductor. The coating paste of the second conductive material of a low-melting-point metal is coated on the first conductor and drying is performed. The second conductive material is fused through thermal treatment, so that the second conductive material is dipped and a non-completely replaced solid-solution through or embedded electrode is formed at the gap of the first conductor.

Description

technical field [0001] The present invention relates to penetrating or embedded electrodes (may be referred to as “embedded electrodes” or “through electrodes”; hereinafter collectively referred to as “through electrodes”) suitable for a three-dimensional laminate of semiconductor chips. [0002] Related to this, the structure of the through-electrode built in the opening on the substrate (hereinafter, the structure including the substrate and the through-electrode is collectively referred to as "electrode structure") and constituent materials; and its manufacturing process. Background technique [0003] There are mainly the following three methods for forming the through-hole electrodes in the openings on the substrate, which are necessary for the three-dimensional lamination technology of semiconductor chips, but each has advantages and disadvantages, and there are still problems in practical use. [0004] One is the representative example of the liquid deposition method, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/15B05D1/18B05D5/12H01L21/288H01L21/3205H01L23/52
Inventor 盆子原学中村博文何奇伟
Owner ZYCUBE