Method and system for realizing expression conversion of cache coherence protocol
A high-speed cache and consistency technology, applied in the direction of program control devices, etc., can solve the problems of slow conversion, labor-intensive, difficult modification, etc., and achieve the effect of improving speed and accuracy
Active Publication Date: 2015-04-22
INSPUR BEIJING ELECTRONICS INFORMATION IND
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Problems solved by technology
However, due to the complexity of the Cache coherence protocol, it becomes very difficult to convert the protocol expressed in the excel table into the expression form of the hardware description language Verilog
At present, the commonly used method is to convert manually line by line, which makes the conversion speed very slow, consumes a lot of labor, and is extremely error-prone
And when the Cache consistency protocol is modified, it is very difficult to manually modify it to Verilog format, and it is also extremely error-prone
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[0038] The technical solutions of the present invention will be described in detail below in conjunction with the accompanying drawings and preferred embodiments. It should be understood that the following examples are only used to illustrate and explain the present invention, but not to limit the technical solution of the present invention.
[0039] Such as figure 2 As shown, the flow of the embodiment of the conversion method for realizing the cache coherence protocol expression of the present invention is shown, including the following steps:
[0040] 110: Write a macro processing tool for the raw data in the record table describing the cache coherence protocol in the application visual language;
[0041] Here, for further illustration below, it is necessary to introduce the general structure of the original data in the record table describing the cache coherence protocol, see figure 1 . Among them, cells A, B, C, and D belong to each condition column, and cells E, F, a...
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The invention discloses a method and a system for realizing the expression conversion of a cache coherence protocol. The method comprises the following steps: writing a macro-processing tool for original data in a record form describing the cache coherence protocol by use of an application visual language; processing the original data in the record form into cell data in a hardware description language format by use of the macro-processing tool; converting the cell data conforming to the hardware description language format into the data in the hardware description language format. The method meets the requirement of realizing the complex cache coherence protocol by use of hardware, and also is capable of realizing the complex cache coherence protocol by use of the hardware description language Verilog timely and accurately while changing the cache coherence protocol.
Description
technical field [0001] The invention relates to the technical field of format conversion in data processing, in particular to a method and system for realizing cache consistency protocol expression conversion. Background technique [0002] With the continuous development of the server application field, the application requirements of high-end servers have entered an important stage. The complex architecture supports high-end server systems to achieve high-performance indicators, high security, high availability, and high reliability. In order to improve the performance of each server, more and more processors (CPUs) are included in each server. With the increase of processors, how to manage so many processors becomes a problem of the server. In a server, data processing such as data transmission, modification and exchange among these processors becomes complicated. How to deal with these problems well is what the cache (Cache) coherence protocol will do. [0003] As the ...
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IPC IPC(8): G06F9/44
Inventor 李灯伟江山刚童元满李仁刚
Owner INSPUR BEIJING ELECTRONICS INFORMATION IND