Unlock instant, AI-driven research and patent intelligence for your innovation.

Fabrication method of gate oxide layer

A gate oxide layer and manufacturing method technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, semiconductor devices, etc., can solve the problems of poor uniformity of thin gate oxide layers, and achieve the effect of ensuring thickness uniformity

Active Publication Date: 2018-03-06
SEMICON MFG INT (SHANGHAI) CORP
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] The purpose of the present invention is to provide a method for manufacturing a gate oxide layer to solve the problem of poor uniformity of the thin gate oxide layer in existing gate oxide layers of different thicknesses

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Fabrication method of gate oxide layer
  • Fabrication method of gate oxide layer
  • Fabrication method of gate oxide layer

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0034] The method for manufacturing the gate oxide layer proposed by the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0035] Please refer to Figure 4 , which is a schematic flowchart of a method for manufacturing a gate oxide layer according to an embodiment of the present invention. Such as Figure 4 As shown, the manufacturing method of the gate oxide layer includes:

[0036] S20: providing a semiconductor substrate;

[0037] S21: forming a first gate oxide layer on the semiconductor substrate;

[0038] S22: coating a photoresist on the first gate oxide layer and...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a manufacturing method of a gate oxide layer. The manufacturing method comprises the following steps: providing a semiconductor substrate; forming a first gate oxide layer on the semiconductor substrate; coating photoresist on the first gate oxide layer, performing photo-etching and wet etching to form an opening; utilizing a solution SPM to remove the photoresist on the first gate oxide layer; utilizing a solution SC1 to remove a parasitic oxide layer on the opening; forming a second gate oxide layer on the opening. According to the manufacturing method of the gate oxide layer provided by the invention, after the photoresist is removed by the solution SPM, the parasitic oxide layer generated when the photoresist is removed by the solution SPM can be removed by the solution SC1, so that the thickness uniformity of the thin type gate oxide layer can be ensured.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing a gate oxide layer. Background technique [0002] In semiconductor devices, the quality of the gate oxide layer directly affects the performance of semiconductor devices, including turn-on voltage, breakdown voltage and saturation current, etc., and also has a great impact on the qualification rate and reliability of semiconductor devices. A very small amount of defects Both may significantly reduce the yield and reliability of integrated circuits. At present, the traditional semiconductor device with a single gate oxide thickness cannot meet the requirements, and multiple gate oxide processes (multiple gate oxide) are more often used to form multiple gate oxide layers with different thicknesses in the same semiconductor device. [0003] Please refer to figure 1 , which is a process flow diagram of manufacturing gate oxide layers w...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28
CPCH01L21/28158
Inventor 张洪强彭坤赵连国王峰王海莲李磊呼翔
Owner SEMICON MFG INT (SHANGHAI) CORP