Die Substrate Assembly And Method
A die and substrate technology, applied in the field of packaging, can solve problems such as high process temperature
Inactive Publication Date: 2015-06-24
AMPLEON NETHERLANDS
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- Application Information
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Problems solved by technology
Current die bonding processes are expensive, usually because of the materials used, and are slow and require high process temperatures
Method used
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[0032] figure 1 A semiconductor die 1 and a metal substrate 2 are shown for chip bonding together using solder. The invention has particular application in the manufacture of RF power packages. The base plate, also known as a header or flange, may include a heat sink for the RF power package. It is important to reduce manufacturing costs while ensuring the reliability of the resulting packages. The relative thermal expansion between the semiconductor die 1 and the substrate 2 needs to be managed, and when high thermal conductivity between the die 1 and the substrate 2 is guaranteed, often expensive materials are used. The present embodiments provide cost-effective die and substrate and manufacturing processes while maintaining high integrity solder interconnects between the die and substrate for structural reliability and efficient heat transfer.
[0033] The die 1 comprises a body 3 of semiconductor material, for example silicon. The body 3 comprises a solder layer 4 comp...
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Abstract
A die (1) comprising a body (3) of semiconductor material, said body (3) configured to receive a solder layer (4) of e.g. an alloy of gold and tin for use in die bonding said die (1) to a substrate (2), wherein the die includes an interface layer (5) on a surface of the body (3) for receiving the solder layer (4), the interface layer (5) having a plurality of sub-layers (5a, 5b, 5c, 5d) of different metals. The interface layer (5) preferably comprises a first sub-layer (5a) of gold applied to the body (3), a second sub-layer (5b) of silver, a third sub-layer (5c) of nickel and a fourth sub-layer (5d) of gold adjoining the solder layer (4). The substrate (2) is preferably made of a copper substrate block (6) with a pad (7) of silver thereon, the substrate (6) and the pad (7) being plated with an outer layer (8) comprising sub-layers of nickel, palladium and gold.
Description
technical field [0001] The invention relates to a method of attaching a die to a substrate. It also relates to a semiconductor die for attachment to a substrate. In addition, the invention relates to a package comprising a die disposed on a substrate. Background technique [0002] Package assembly includes the step of bonding the semiconductor die to a substrate, typically a metal. The substrate typically comprises CPC or copper tungsten (CuW). The CPC substrate includes a sandwich structure. The top and bottom layers are composed of copper, and the layer between the top and bottom layers includes a copper molybdenum (CuMo) alloy. The die itself is typically bonded to the substrate by a eutectic gold silicon (AuSi) die-bonding process. This process involves applying a relatively thick layer of gold on the substrate (around 1000-2500nm) and on the die (typically 300nm) before bonding together. Current die-bonding processes are expensive, usually because of the materials...
Claims
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IPC IPC(8): H01L23/488H01L21/60
CPCH01L24/29H01L23/4827H01L23/66H01L24/03H01L24/05H01L24/27H01L24/32H01L24/83H01L2223/6644H01L2224/03825H01L2224/03826H01L2224/05026H01L2224/0508H01L2224/05082H01L2224/05083H01L2224/05139H01L2224/05144H01L2224/05155H01L2224/05644H01L2224/2745H01L2224/2746H01L2224/27464H01L2224/29084H01L2224/29111H01L2224/29139H01L2224/29144H01L2224/29147H01L2224/29155H01L2224/32245H01L2224/32502H01L2224/83203H01L2224/83207H01L2224/83444H01L2224/83805H01L2924/01028H01L2924/01047H01L2924/01079H01L2924/014H01L2924/1421H01L2924/15747H01L2924/00014H01L2924/0105H01L2924/01014
Inventor 约翰内斯·威尔赫尔姆斯·范里克瓦塞尔埃米尔·德·布鲁因
Owner AMPLEON NETHERLANDS