Waveform calibration using built in self test mechanism

Abstract

A system on a chip (SoC) includes a transceiver comprising a transmitter having a power amplifier and a receiver having a signal buffer. At least one of the transmitter and receiver has a configurable portion that can be configured to produce a range of waveforms (both in waveshape as well as duty cycle). A low cost built in self test (BIST) logic is coupled to the transceiver. The BIST logic is operable to calibrate the configurable portion of the transceiver to produce a waveform that has a selected harmonic component that has an amplitude that is less than a threshold value. Current consumed by the transceiver may be dynamically reduced by selecting an optimized waveform that has low harmonic components.

Description

technical field [0001] Embodiments of the present invention relate generally to transceivers for radio frequency transmission, and in particular to optimization of the waveform shape of high speed clock signals within transceivers to reduce power consumption. Background technique [0002] System-on-Chip (SoC) is a concept that has existed for a long time; the basic approach is to integrate more and more functionality into a given device. This integration can take the form of hardware or solution software. Many SoC designs pair one or more microprocessor cores with various peripheral devices and memory circuits. [0003] A radio frequency (RF) transceiver may be included within the SoC and may include a fully integrated CMOS low noise amplifier (LNA) and power amplifier (PA). A differential circuit is usually chosen to reduce the effect of ground noise in the LNA circuit and to double the output power level of the PA at the same supply voltage. [0004] The Bluetooth stand...

AI Technical Summary

Problems solved by technology

Several platforms are already available in the market for rapid development and prototyping of Bluetooth SoCs to shorten design cycles and limit the scope of design teams

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