Transistor and manufacturing method thereof

Abstract

The invention provides a transistor and a manufacturing method thereof. The manufacturing method comprises the following steps: patterning a first semiconductor layer and forming a source part, a drain part and a fin between the source part and the drain part; removing part of a dielectric layer and making the fin suspended on the remaining dielectric layer; performing the step of oxidizing the fin and removing an oxide layer twice or more to form a nanowire; and forming a fence structure on the nanowire. The transistor comprises a substrate, a germanium nanowire, and a fence structure. The substrate comprises a silicon layer, and a dielectric layer and a germanium-silicon layer disposed on the silicon layer sequentially. A groove is formed in the germanium-silicon layer and part of the dielectric layer, and the parts of the first semiconductor layer at the two sides of the groove are respectively used as a source or a drain. The germanium nanowire is disposed between the source and the drain and is in contact with the source and the drain. The fence structure fills the groove and covers the nanowire. According to the invention, the carrier mobility of the channel region of the transistor can be improved, and the performance of the transistor can be optimized.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, and in particular, to a transistor and a manufacturing method thereof. Background technique [0002] In order to keep up with Moore's Law, the feature size of semiconductor devices is gradually decreasing. Improving performance by shrinking the physical size of conventional field-effect transistors has faced some difficulties because the switching performance of transistors is degraded by short channel effects and gate leakage issues at small sizes. [0003] In order to suppress the short-channel effect, the prior art has developed a Nanowire Field-Effect Transistor (NWFET) technology. [0004] The NWFET has a one-dimensional nanowire channel, usually using a gate-wrap structure, and the gate can modulate the one-dimensional nanowire channel from multiple directions, thereby enhancing the modulation capability of the gate and improving the threshold characteristics. [0005] It c...

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Problems solved by technology

[0006] However, the existing NWFET technology has the problem of low carrier mobility in the channel region, and some manufacturing methods for improving carrier mobility in the prior art are relative

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