Transistor and manufacturing method thereof
A manufacturing method and transistor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of small and complex carrier mobility in the channel region, and achieve the effects of simplified manufacturing process and good compatibility
Patent Information
- Authority / Receiving Office
- CN · China
- Current Assignee / Owner
- Publication Date
- 2015-07-01
- Estimated Expiration
- Not applicable · inactive patent
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Abstract
Description
technical field
[0001] The present invention relates to the technical field of semiconductors, and in particular, to a transistor and a manufacturing method thereof. Background technique
[0002] In order to keep up with Moore's Law, the feature size of semiconductor devices is gradually decreasing. Improving performance by shrinking the physical size of conventional field-effect transistors has faced some difficulties because the switching performance of transistors is degraded by short channel effects and gate leakage issues at small sizes.
[0003] In order to suppress the short-channel effect, the prior art has developed a Nanowire Field-Effect Transistor (NWFET) technology.
[0004] The NWFET has a one-dimensional nanowire channel, usually using a gate-wrap structure, and the gate can modulate the one-dimensional nanowire channel from multiple directions, thereby enhancing the modulation capability of the gate and improving the threshold characteristics.
[0005] It c...
Examples
Embodiment Construction
[0017] Although the nanowire field effect transistor in the prior art suppresses the short channel effect, the carrier mobility in the channel region of the transistor in the prior art does not meet the requirements, and the performance of the transistor is not good enough.
[0018] In order to solve the problems of the prior art, the present invention provides a method for manufacturing a transistor. refer to figure 1 , showing a schematic flow chart of an embodiment of the method for manufacturing a transistor of the present invention. The manufacturing method generally includes the following steps:
[0019] Step S1, providing a substrate, the substrate comprising a second semiconductor layer, a dielectric layer and a first semiconductor layer sequentially located on the second semiconductor layer;
[0020] Step S2, patterning the first semiconductor layer to form a source portion, a drain portion, and a fin between the source portion and the drain portion;
[0021] Step ...