Subthreshold SRAM memory cell

A storage unit and sub-threshold technology, which is applied in the field of memory, can solve the problems of reducing static power consumption and short-circuit power consumption, and achieve the effects of reducing static power consumption, reducing dynamic power consumption, and improving SRAM performance

Active Publication Date: 2015-09-16
锐立平芯微电子(广州)有限责任公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

where due to dynamic power dissipation versus V DD In the quadratic relationship, it accounts for the main proportion of th

Method used

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Embodiment Construction

[0028] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments of the present invention. It should be understood that the present invention is not limited to the specific embodiments described below, and those skilled in the art may make various variations or modifications within the scope of the appended claims.

[0029] Such as figure 1 As shown, the present invention provides a sub-threshold storage circuit, the structure comprising: a basic circuit, a cell data readout circuit, a pre-amp tube circuit and an improved Schmidt inverter;

[0030] The circuit includes: a basic circuit, a unit data readout circuit, a pre-amp tube circuit and an improved Schmidt inverter; wherein, the output end of the basic circuit is connected to the input end of the unit data readout circuit, and the unit data readout circuit is connected to the input end of the unit data readout circuit. The output end is connecte...

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Abstract

The invention provides a subthreshold SRAM memory cell, which comprises a basic circuit, a unit data playback circuit, a pre-tube circuit and an improved Schmidt phase inverter. According to the invention, an output terminal (QB) of the basic circuit is connected to an input terminal of the unit data playback circuit, an output terminal of the unit data playback circuit is connected to output of the pre-tube circuit, and the input terminal of the improved Schmidt phase inverter is connected; wherein, the pre-tube circuit comprises a third NMOS pipe (MN3), a source terminal of the pipe is connected to ground, a grid terminal is connected to a pre-control signal PREDIS, and a leakage terminal is connected to a read bit line RBL. The SRAM unit employs a pre-placed read mode to reduce power consumption; due to loss of NMOS transmitted high level threshold, dynamic power consumption is greatly reduced, static state power consumption is reduced at certain degree, the swing of the read data can be identified even not reach full swing, and SRAM performance can be obviously increased.

Description

technical field [0001] The invention relates to the field of memory, in particular to a near-subthreshold 8-tube SRAM unit with a new readout method. Background technique [0002] With the rise of the Internet of Things, medical electronics, RFID and other application fields, a large number of wireless sensor nodes are widely used. Typical characteristics of this type of node are large number of requirements, small system size, low performance requirements, and extremely high power consumption requirements. In such nodes, the memory occupies a large proportion of power consumption, so reducing the power consumption of the memory is of great help to reduce the power consumption of the whole machine. As a commonly used memory, SRAM has been extensively studied. To minimize power consumption, near-subthreshold designs have flourished. [0003] The power consumption of each operation of any tube is: [0004] P transistor = ...

Claims

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Application Information

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IPC IPC(8): G11C11/413
Inventor 黑勇蔡江铮陈黎明
Owner 锐立平芯微电子(广州)有限责任公司
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