Image processing system based on Field Programmable Gate Array (FPGA)

An image processing and image technology, applied in the field of image processing, can solve problems such as complex debugging, achieve the effects of low power consumption and enhanced signal anti-interference ability

Inactive Publication Date: 2015-11-11
AVIC HUADONG OPTOELECTRONICS (SHANGHAI) CO LTD
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Problems solved by technology

[0003] In order to overcome the problem of complex debugging in FPGA-based image processing in the prior art, the present invention provides an FPGA-based

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  • Image processing system based on Field Programmable Gate Array (FPGA)
  • Image processing system based on Field Programmable Gate Array (FPGA)
  • Image processing system based on Field Programmable Gate Array (FPGA)

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[0014] In the following, with reference to the drawings, through the description of the embodiments, the specific implementation of the present invention such as the shape and structure of the various components involved, the mutual position and connection relationship between the various parts, the function and working principle of each part, and the manufacturing process And the operation and use method, etc., are described in further detail to help those skilled in the art have a more complete, accurate and in-depth understanding of the inventive concept and technical scheme of the present invention.

[0015] An image processing system based on FPGA. This system is mainly composed of a video decoding source, an image processing module and a video encoding module. The image processing module is built in FPGA with FPGA as the core, and the image processing is performed by the FPGA. The video decoding source is generated by the instrument simulation. After the decoding module coll...

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Abstract

The invention relates to an image processing system based on a Field Programmable Gate Array (FPGA), and belongs to the field of image processing. The system includes: a video decoding module, an image processing module arranged on the FPGA and a video coding module, wherein the video decoding module includes a LVDS receiving unit, a CCIR-D receiving unit and a SD-SDI receiving unit, and the video coding module includes a DVI coding module and a CCIR-D coding module. According to the invention, the SD-SDI receiving unit adopts an equalizer GS2994, and a clock recovery device GS2965 for strengthening the signal anti-interruption capacity, and adopts a SDRAM sequential to realize conversion of a PAL sequential and a VGA sequential; the chip clock of the SDRAM can meet the requirements of the design at 100 MHZ. The image processing system has small power consumption. The image processing system and the FPGA require no need of occupation of exclusive pins therebetween. The image processing system addresses the problem of complexity of debugging of image processing based on FPGA in the prior art.

Description

technical field [0001] The invention belongs to the field of image processing, relates to the direction of image processing based on FPGA, and in particular relates to an image processing system based on FPGA. Background technique [0002] Digital image processing technology has a wide range of applications in daily life, production and construction, national defense and security. It is difficult for traditional image processing technology to meet the processing effect and real-time requirements when processing a large amount of data. The rapid development of chip technology makes it possible to realize real-time processing of digital images through hardware. Among them, FPGA (Field Programmable Gate Array) is due to its The characteristics of parallel computing make it an ideal choice for real-time image processing. When designing an FPGA-based image processing system, designers often need to perform time-consuming and laborious debugging. Contents of the invention [0...

Claims

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Application Information

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IPC IPC(8): H04N7/18H04N19/42
Inventor 范旭龙
Owner AVIC HUADONG OPTOELECTRONICS (SHANGHAI) CO LTD
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