Memorizer programming verification method and programming verification apparatus
A memory and storage unit technology, applied in the field of memory programming verification and programming verification devices, can solve problems such as inaccurate programming verification results, and achieve the effect of ensuring accuracy and accurate comparison results
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Embodiment 1
[0031] refer to figure 2 , which shows a flow chart of the steps of an embodiment of a memory programming method of the present invention, which may specifically include the following steps:
[0032] Step 202, sending a data read command for performing program verification.
[0033] Wherein, the data reading instruction is used to read data from the selected storage unit.
[0034] After the programming operation is completed, it is necessary to verify the programmed storage unit, use the programmed storage unit as the selected storage unit, generate and send a data read instruction for performing programming verification, wherein the data read instruction is used for Data is read from the selected storage unit, so the data read instruction may include information such as the identifier of the selected storage unit, such as the array number in the memory, and the like.
[0035] Step 204, according to the data read instruction, the voltage generating module of the memory prov...
Embodiment 2
[0042] On the basis of the above-mentioned embodiments, this embodiment continues to discuss the program verification method of the memory, wherein the schematic diagram of the storage array of the memory is as follows image 3 As shown, the schematic diagram of the sense amplifier is shown as Figure 4 shown.
[0043] Wherein, the drains of memory cells N1, N2, N3 and N4 etc. are connected to the same bit line BL1, and their sources are all grounded (0V); I Cell is the actual current measured on the bit line, I Ref is the preset current, and out is the result of comparing the input. The programming verification method will be discussed below in conjunction with the memory array as an example.
[0044] refer to Figure 5 , which shows a flow chart of steps in an optional embodiment of a memory programming method of the present invention, which may specifically include the following steps:
[0045] Step 502, sending a data read instruction for performing program verificatio...
Embodiment 3
[0067] On the basis of the above embodiments, this embodiment also provides a programming verification device.
[0068] refer to Figure 6 , which shows a structural block diagram of an embodiment of a programming verification device according to the present invention, which may specifically include the following modules:
[0069] The programming verification device includes: a sending module 602 , a voltage input module 604 , a current reading module 606 and a verification detection module 608 .
[0070] Among them, the sending module 602 is used to send a data read instruction for performing programming verification, wherein the data read instruction is used to read data from the selected storage unit; the voltage input module 604 is used to read data according to the data An instruction to provide a preset positive voltage for the selected storage unit, and provide a set negative voltage for other storage units on the same bit line as the selected storage unit, so as to re...
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