Memorizer programming verification method and programming verification apparatus

A memory and storage unit technology, applied in the field of memory programming verification and programming verification devices, can solve problems such as inaccurate programming verification results, and achieve the effect of ensuring accuracy and accurate comparison results

Inactive Publication Date: 2015-11-25
GIGADEVICE SEMICON (BEIJING) INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The embodiment of the present invention provides a memory program verification method to solve the problem of inaccurate program verification results

Method used

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  • Memorizer programming verification method and programming verification apparatus
  • Memorizer programming verification method and programming verification apparatus
  • Memorizer programming verification method and programming verification apparatus

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Embodiment 1

[0031] refer to figure 2 , which shows a flow chart of the steps of an embodiment of a memory programming method of the present invention, which may specifically include the following steps:

[0032] Step 202, sending a data read command for performing program verification.

[0033] Wherein, the data reading instruction is used to read data from the selected storage unit.

[0034] After the programming operation is completed, it is necessary to verify the programmed storage unit, use the programmed storage unit as the selected storage unit, generate and send a data read instruction for performing programming verification, wherein the data read instruction is used for Data is read from the selected storage unit, so the data read instruction may include information such as the identifier of the selected storage unit, such as the array number in the memory, and the like.

[0035] Step 204, according to the data read instruction, the voltage generating module of the memory prov...

Embodiment 2

[0042] On the basis of the above-mentioned embodiments, this embodiment continues to discuss the program verification method of the memory, wherein the schematic diagram of the storage array of the memory is as follows image 3 As shown, the schematic diagram of the sense amplifier is shown as Figure 4 shown.

[0043] Wherein, the drains of memory cells N1, N2, N3 and N4 etc. are connected to the same bit line BL1, and their sources are all grounded (0V); I Cell is the actual current measured on the bit line, I Ref is the preset current, and out is the result of comparing the input. The programming verification method will be discussed below in conjunction with the memory array as an example.

[0044] refer to Figure 5 , which shows a flow chart of steps in an optional embodiment of a memory programming method of the present invention, which may specifically include the following steps:

[0045] Step 502, sending a data read instruction for performing program verificatio...

Embodiment 3

[0067] On the basis of the above embodiments, this embodiment also provides a programming verification device.

[0068] refer to Figure 6 , which shows a structural block diagram of an embodiment of a programming verification device according to the present invention, which may specifically include the following modules:

[0069] The programming verification device includes: a sending module 602 , a voltage input module 604 , a current reading module 606 and a verification detection module 608 .

[0070] Among them, the sending module 602 is used to send a data read instruction for performing programming verification, wherein the data read instruction is used to read data from the selected storage unit; the voltage input module 604 is used to read data according to the data An instruction to provide a preset positive voltage for the selected storage unit, and provide a set negative voltage for other storage units on the same bit line as the selected storage unit, so as to re...

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PUM

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Abstract

The invention provides a memorizer programming verification method and a programming verification apparatus so as to solve the problem that a programming verification result is not accurate. The method comprises sending a data reading instruction executing programming verification, wherein the data reading instruction is used to read data from a selected storage unit; reading the instruction according to data, wherein a voltage generation module of a memorizer provides a preset positive voltage for the selected storage unit and provides a preset negative voltage for other storage units which are at a bit line same to that of the selected storage unit, so that leakage current of the other storage unit is reduced; reading actual current of the bit line through a reading amplifier of the memorizer; and comparing the actual current with preset current, and determining whether programming verification of the selected storage unit is successful according to the comparison result. According to the technical scheme, leakage current of the other storage units is reduced, the actual current on the bit line is relatively close to the current generated by the selected storage unit, and accuracy of programming verification is guaranteed.

Description

technical field [0001] The invention relates to the technical field of storage, in particular to a memory programming verification method and a programming verification device. Background technique [0002] The memory cells of the memory are generally located in a large memory array. Based on the structural characteristics of the memory, many (usually several thousand) memory cells are connected to the same bit line (BL). [0003] When a storage unit on a certain BL line is selected for operation, other storage units connected to the BL line will still affect the BL line even though they are selected. In the programming verification of the memory, a memory cell on a certain BL line is selected for testing, but due to the influence of other memory cells on the BL line, the current in the BL line is inaccurate, thereby affecting the verification result. Moreover, with the continuous shrinking of the process size, the influence of memory cells on the BL line becomes greater an...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/10
Inventor 胡洪王林凯
Owner GIGADEVICE SEMICON (BEIJING) INC
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