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Reconstituted interposer semiconductor package

A technology of semiconductors and packages, applied in the field of reconfigured plug-in semiconductor packages, which can solve problems such as complex products for users

Inactive Publication Date: 2015-11-25
AVAGO TECH WIRELESS IP SINGAPORE PTE
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] User products become more complex with multiple features and functions

Method used

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  • Reconstituted interposer semiconductor package
  • Reconstituted interposer semiconductor package
  • Reconstituted interposer semiconductor package

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0046] Multiple ICs may be mounted on a substrate and interconnected using wire bonds and / or metal patterns to form a package. An example of a multi-chip IC package is an application microprocessor, which may include a separate IC for such things as memory within the same package.

[0047] ICs can be manufactured at wafer level, where 10, 100, or 1000 ICs are formed within a single semiconductor wafer. The wafer material can be silicon, gallium arsenide or other semiconductor materials. Figure 1A A wafer 100 containing a plurality of ICs 110 is shown. IC 110 may be square or rectangular in shape, as well as other shapes suitable for a particular manufacturing process. The ICs 110 are separated from each other in a separation process, which can be separated by drawing a boundary line between individual ICs 110 and then sawing, breaking or cutting the ICs 110 .

[0048] Figure 1BA cross-sectional area of ​​IC 110 is shown. IC 110 has an inactive surface 120 and an active ...

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PUM

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Abstract

A reconstituted semiconductor package and a method of making a reconstituted semiconductor package are described. An array of die-attach substrates is formed onto a carrier. A semiconductor device is mounted onto a first surface of each of the die-attach substrates. An interposer substrate is mounted over each of the semiconductor devices. The interposer substrates are electrically connected to the first surface of the respective die-attach substrates. A molding compound is filled in open spaces within and between the interposer substrates mounted to their respective die-attach substrates to form an array of reconstituted semiconductor packages. Electrical connections are mounted to a second surface of the die-attach substrates. The array of reconstituted semiconductor packages is singulated through the molding compound between each of the die-attach substrates and respective mounted interposer substrates.

Description

technical field [0001] This application claims priority to US Provisional Application No. 62 / 001,367, filed May 21, 2014, which is hereby incorporated by reference in its entirety. Background technique [0002] A semiconductor package may be a metal, plastic, glass, or ceramic housing containing one or more semiconductor electronic components, also known as a chip or an integrated circuit (IC). The package provides protection against impact and abrasion, as well as environmental factors such as moisture, oxidation, heat and contaminants. Wires lead from the package to electrical contacts or leads and connect to other devices and / or to an intermediate substrate, or directly to a circuit board. A package may have as few as two leads or contacts for a device, such as a diode, or several hundred leads or contacts in the case of a microprocessor. [0003] A semiconductor package may be a dedicated stand-alone device that may be mounted to a printed circuit board (PCB) or printe...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L23/488H01L21/56H01L21/60
CPCH01L23/49811H01L21/4853H01L21/561H01L21/565H01L21/568H01L21/78H01L23/3121H01L23/3128H01L23/49833H01L24/05H01L24/13H01L24/16H01L24/29H01L24/32H01L24/45H01L24/48H01L24/73H01L24/81H01L24/83H01L24/92H01L24/97H01L2224/0401H01L2224/04042H01L2224/05124H01L2224/05624H01L2224/05647H01L2224/05655H01L2224/05672H01L2224/06135H01L2224/13082H01L2224/131H01L2224/13111H01L2224/13139H01L2224/13147H01L2224/16225H01L2224/16245H01L2224/29012H01L2224/29014H01L2224/29015H01L2224/2919H01L2224/32225H01L2224/32245H01L2224/45139H01L2224/45144H01L2224/45147H01L2224/45565H01L2224/45664H01L2224/48091H01L2224/48227H01L2224/48247H01L2224/73204H01L2224/73253H01L2224/73265H01L2224/81815H01L2224/83191H01L2224/83192H01L2224/83193H01L2224/83855H01L2224/92125H01L2224/92225H01L2224/92247H01L2224/97H01L2924/10253H01L2924/10329H01L2924/15321H01L2924/15331H01L2924/15787H01L2924/1579H01L2924/181H01L2924/00011H01L2225/1023H01L2225/1029H01L2225/1041H01L23/5389H01L2224/81191H01L2924/014H01L2924/00012H01L2224/81H01L2224/83H01L2224/85H01L2924/00H01L2924/00014H01L2924/01005
Inventor 罗立德赵子群胡坤忠雷佐尔·拉赫曼·卡恩
Owner AVAGO TECH WIRELESS IP SINGAPORE PTE
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