Vertical MOS power device and formation method thereof

Abstract

The invention provides a vertical MOS power device. The vertical MOS power device can be a plane type or a groove type. In the vertical MOS power device, the entire or part of a grid electrode which generates a Miller capacitance is eliminated, the Miller capacitance is reduced distinctly, so that the feedback effect of voltage changes of a second electrode on the grid electrode voltage is eliminated or reduced distinctly, and therefore a Miller platform or an oscillation phenomenon in the switching process is avoided or reduced, the switching time of a device is shortened, the switch speed of the device is improved, the switch consumption is reduced, the power device is made safer and more reliable. The vertical MOS power device has advantages of being simple in structure, being low in cost and the like. The invention also provides a formation method of the vertical MOS power device.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a vertical MOS power device and a forming method thereof. Background technique [0002] The gate of the vertical MOS power device is driven by voltage, which has the advantages of fast switching speed and simple driving circuit, and is widely used in low-voltage and medium-high voltage fields. Common MOS type power devices are mainly divided into planar type and trench type according to the shape of the gate structure and the direction of the channel. figure 1 It is a schematic diagram of a traditional planar vertical MOS power device. Among them, 101 is a voltage-resistant layer, 102 is a P-type well region, 103 is an n-type source region, 104 is a gate oxide layer, 105 is a gate, 106 is an insulating layer dielectric, 107 is a cathode, and the anode is under the voltage-resistant layer 101 Not drawn. The portion of the surface of the P-type well region 102 opposite to...

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Problems solved by technology

This leads to the fact that during the turn-on process, the gate voltage needs to maintain a period of charging time before it can continue to rise after reaching the Miller platform, and it needs to maintain a period of time after the gate voltage drops to the Miller platform during the turn-off process before it can continue to decline, which reduces the switching speed and at the same time greatly increases the switching losses of the device

Moreover, since the change of the anode voltage is often very large, its feedback may also cause a violent waveform of the gate voltage and form an oscillation, causing the device to malfunction or even burn out

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