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Jumper-free circuit for program running and JTAG program downloading

A technology of program download and program operation, applied in the direction of program loading/starting, program control device, and the generation of response errors, etc., can solve the problems affecting the normal operation of the watchdog circuit, the virtual connection of the contact circuit, and the increase of time-consuming, etc. Achieve the effect of saving download and debugging time, jumper-free, and low cost

Active Publication Date: 2016-01-06
INTEGRATED ELECTRONICS SYST LAB
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the process of mass production and debugging, the jumper or DIP switch will be frequently operated, which is boring and time-consuming. At the same time, adding a jumper or DIP switch to the circuit is equivalent to adding a mechanical failure point. Long-term working contacts are easy to be oxidized to cause virtual connection of the circuit, which affects the normal operation of the watchdog circuit. Therefore, the integration and improvement of JTAG program download and external hardware watchdog monitoring circuit has high application value

Method used

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  • Jumper-free circuit for program running and JTAG program downloading
  • Jumper-free circuit for program running and JTAG program downloading
  • Jumper-free circuit for program running and JTAG program downloading

Examples

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Effect test

Embodiment 1

[0029] The jumper-free circuit for program running and JTAG program download includes CPU, watchdog chip, and JTAG programmer. The CPU outputs a feed signal to the watchdog chip, and the power signal SWD_3.3V of the JTAG programmer is pulled down by the third Resistor R3 is grounded and connected with the watchdog reset signal RESET_WD output by the watchdog chip to output the first signal RSTM after the OR gate, and the first signal RSTM is the same as the JTAG reset signal SWD_RST output by the JTAG writer through the AND gate. The second signal RESET_CPU is input to the CPU as a CPU reset signal. In addition, the JTAG reset signal SWD_RST is connected to the system power supply VCC_3.3V through the second pull-up resistor R2, and the second signal RESET_CPU is connected to the system power supply VCC_3.3V through the first pull-up resistor R1.

Embodiment 2

[0031] The jumper-free circuit for program running and JTAG program download includes CPU, watchdog chip, and JTAG programmer. The CPU outputs the feed signal to the watchdog chip, and the power signal SWD_3.3V of the JTAG programmer is connected to diode D2 The anode of the watchdog chip, the watchdog reset signal RESET_WD output by the watchdog chip is connected to the cathode of the diode D2 through the sixth resistor R6; the cathode of the diode D2 is connected to the first cathode input of the common anode Schottky diode D1, JTAG programming The JTAG reset signal SWD_RST output by the device is connected to the second cathode input terminal of the common anode Schottky diode D1, the JTAG reset signal SWD_RST is connected to the system power supply VCC_3.3V through the fifth pull-up resistor R5, and the common anode Schottky diode D1 The anode is connected to the system power supply VCC_3.3V through the fourth pull-up resistor R4, and the anode of the common anode Schottky ...

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Abstract

The invention provides a jumper-free circuit for program running and JTAG program downloading. The jumper-free circuit comprises a CPU, a watchdog chip and a JTAG writer, wherein the CPU outputs a feeding-dog signal to the watchdog chip; a first signal RSTM is output by a watchdog reset signal RESET-WD output by the watchdog chip and a power supply signal SWD-3.3V of the JTAG writer through a 'or' logic; a second signal RESET-CPU is output by the first signal RSTM and a JTAG reset signal SWD-RST output by the JTAG writer through an 'and' logic; the signal is input into the CPU as a CPU reset signal; and the JTAG writer interacts with the CPU through data, clock and reset signals. The jumper-free circuit has the advantage that circuit switching devices such as a change-over switch and a dial switch are avoided, and is free of a jumper, high in reliability and low in cost; the JTAG program downloading and debugging time is greatly shortened; the area of a printed circuit board (PCB) is reduced; the production efficiency is improved; and meanwhile, the product running reliability is also increased.

Description

technical field [0001] The invention relates to a jumper-free circuit, in particular to a jumper-free circuit for program operation and JTAG program download. Background technique [0002] In the field of industrial control using single-chip microcomputer, in order to ensure the reliable operation of the single-chip microcomputer control system, a typical application requires an external hardware watchdog circuit to monitor the program. [0003] Under normal circumstances, the program will generate a "feed the dog" signal, which will not cause the system to reset, but during the download process of the JTAG programmer program (initial program download process), because the CPU will not When the "feed dog" signal is generated, the external watchdog will generate a reset signal, which will cause the JTAG programmer to fail to complete the program download process. Therefore, the traditional method must complete the program programming through the following steps: [0004] 1: ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/445G06F11/07
Inventor 崔士军尹燕磊李荣兴聂萌
Owner INTEGRATED ELECTRONICS SYST LAB
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