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On-chip integrated differential inductor with adjustable inductance value

A technology of differential inductance and inductance value, which is applied in the direction of circuits, electrical components, electric solid devices, etc., and can solve the problem of non-adjustable inductance value of differential inductance

Active Publication Date: 2016-01-13
WENZHOU UNIVERSITY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The present invention aims at the problem that the inductance value of the current on-chip differential inductor cannot be adjusted or that a non-standard CMOS process must be used to design a differential inductance with an adjustable inductance value, and proposes an on-chip differential inductance with adjustable inductance value based on a multilayer coplanar waveguide. Change the inductance value of the differential inductor by changing the control voltage of the on-chip CMOS switch, thereby increasing the adjustable range of the inductance value

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  • On-chip integrated differential inductor with adjustable inductance value
  • On-chip integrated differential inductor with adjustable inductance value
  • On-chip integrated differential inductor with adjustable inductance value

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Embodiment Construction

[0020] Below in conjunction with accompanying drawing and embodiment the present invention is described in further detail:

[0021] figure 1 100 is the matrix material, 101 is the bottom metal (metal layer one), 102 is the metal layer two, 103 is the metal layer three, 104 is the metal layer four, 105 is the metal layer five, 106 is the metal layer six; 107 is the metal layer The contact layer between layer 1 and the substrate, 108 is the via hole 1 between the metal layer 1 and the metal layer 2, 109 is the via hole 2 between the metal layer 2 and the metal layer 3, and 110 is the metal layer 3 and the metal layer The third via hole between four, 111 is the fourth via hole between the fourth metal layer and the fifth metal layer, and 112 is the fifth via hole between the fifth metal layer and the sixth metal layer.

[0022] figure 2 104 and 127 are respectively the multilayer coplanar waveguides, which are connected from the top metal layer to the bottom metal layer (metal...

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Abstract

The invention discloses an on-chip integrated differential inductor with an adjustable inductance value. A multi-layer coplanar waveguide structure is adopted, four pairs of top-layer metal connection lines are arranged between two differential signal lines, and an on-chip complementary metal oxide semiconductor (CMOS) switch is arranged between each pair of metal connection lines. With the adoption of the above structure, the connection state of the CMOS switch is controlled by changing the voltage applied to a grid of the CMOS switch, the inductance value is adjusted by changing the connection positions of the differential signal lines, thus, the performance of a millimeter-wave chip can be adjusted, the defect of incapability of changing the inductance value of the differential inductor by the standard CMOS process can be overcome, and the yield of the chip is improved.

Description

technical field [0001] The invention relates to an on-chip integrated differential inductor, in particular to a differential inductor with adjustable inductance value. Background technique [0002] Inductance is one of the key components of millimeter-wave integrated circuits. Due to the existence of various parasitic inductances and parasitic capacitances in millimeter-wave integrated circuits, after tape-out, the test results of the circuit may have a large deviation from the simulation results, and even cause the chip to malfunction. Work. However, the inductance value of commonly used on-chip spiral inductors and on-chip coplanar waveguide inductors cannot be adjusted. Therefore, designing an on-chip inductor with adjustable inductance after tape-out can adjust the performance of the chip according to needs, thereby improving the yield rate of the chip. [0003] The differential model consists of two signals of equal magnitude and opposite phase. The advantage of the d...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/64H01L27/02
Inventor 刘桂潘跃晓
Owner WENZHOU UNIVERSITY