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Mixed wafer level vacuum packaging method and structure

A vacuum packaging, wafer-level technology, applied in the manufacture of electrical components, electrical solid devices, semiconductor/solid devices, etc., can solve the problems of wasting infrared filters, low efficiency, poor performance, etc., to reduce packaging volume and reduce packaging Cost, the effect of improving packaging efficiency

Active Publication Date: 2016-02-03
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The traditional vacuum packaging method is to use metal shells for packaging, generally including metal sockets and infrared filters. This vacuum packaging method is slightly less efficient; wafer-level vacuum packaging is to complete the vacuum packaging of the entire wafer before slicing. , which improves the packaging efficiency, but due to the detector chip yield, some chips with poor performance are packaged, wasting some expensive infrared filters

Method used

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  • Mixed wafer level vacuum packaging method and structure
  • Mixed wafer level vacuum packaging method and structure
  • Mixed wafer level vacuum packaging method and structure

Examples

Experimental program
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Effect test

Embodiment 1

[0067] This embodiment provides a hybrid wafer-level vacuum packaging method, including the following steps:

[0068] First perform step a), provide a substrate sheet, and form a chip package cavity in the substrate sheet;

[0069] Then proceed to step b), making a getter film in the chip package cavity of the substrate sheet;

[0070] Then proceed to step c), providing a chip to be packaged that has passed the test including the substrate and the device area; wherein, if necessary, metal pillars for electrical leads need to be formed in the substrate of the chip to be packaged;

[0071] Finally, step d) is carried out, providing a vacuum device, after aligning the chip to be packaged and the chip packaging cavity, vacuumize, activate the getter, heat and pressurize, and bond the substrate and the chip through the bonding structure Describe the chip to be packaged.

[0072] As an example, in another embodiment, step a) may also include the step of forming a limiting groove i...

Embodiment 2

[0105] like Figure 2a ~ Figure 2g As shown, this embodiment provides a hybrid wafer-level vacuum packaging method, the basic steps of which are as in Embodiment 1, wherein the main difference between the packaging method of this embodiment and Embodiment 1 is that in step 1) of Embodiment 1 In addition to making the chip package cavity 11, a vacuum buffer cavity 15 is also made around the chip package cavity 11 to prolong the service life of the device.

[0106] Specifically, this embodiment includes the following steps:

[0107] like Figure 2a As shown, step 1) is first carried out, and on the infrared filter 1 (double-thrown silicon wafer or germanium wafer or zinc sulfide wafer), use corrosion, etching or laser processing methods to make a chip package on the surface of the infrared filter 1 Chamber 11 and vacuum buffer chamber 15; in the subsequent process (in the final vacuum packaging step), an appropriate amount of getter can be placed and fixed in the cavity of the...

Embodiment 3

[0116] like Figure 3a ~ Figure 3g As shown, this embodiment provides a hybrid wafer-level vacuum packaging method, the basic steps of which are as in Embodiment 1, wherein the main difference between the packaging method of this embodiment and Embodiment 1 is that in step 1) of Embodiment 1 In addition to making the chip package cavity 11 in the infrared filter 1, a limit groove 16 for limiting the position of the chip is also made.

[0117] Specifically, this embodiment includes the following steps:

[0118] like Figure 3a As shown, step 1) is first carried out, and on the infrared filter 1 (double-thrown silicon wafer or germanium wafer or zinc sulfide wafer), use corrosion, etching or laser processing methods to make a chip package on the surface of the infrared filter 1 Cavity 11 and limiting groove 16;

[0119] like Figure 3b As shown, then carry out step 2), make infrared anti-reflection film 12 at the bottom of chip package cavity 11 and the lower surface of infr...

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Abstract

The invention provides a mixed wafer level vacuum packaging method and structure. The mixed wafer level vacuum packaging method comprises the following steps of a), providing a substrate slice, and forming a chip packaging cavity in the substrate slice; b), making a degasser thin film in the chip packaging cavity in the substrate slice; c), providing a to-be-packaged chip, wherein the to-be-packaged chip has passed a test and comprises a substrate and a device region; and d) providing a vacuum device, enabling the to-be-packaged chip and the chip packaging cavity to be aligned, vacuumizing, activating the degasser, heating, pressurizing, and bonding the substrate slice and the to-be-packaged chip by a bonding structure. The packaging method only packages to-be-packaged chips which have passed tests, so that the packaging cost is reduced; the chip packaging cavity is directly manufactured on the substrate slice, such as an infrared filter, and the to-be-packaged chip, such as an infrared detector chip and the like, is put in the chip packaging cavity to finish the vacuum packaging, so that the packaging efficiency is improved, and the packaging volume is reduced.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, in particular to a hybrid wafer-level vacuum packaging method and structure. Background technique [0002] Infrared detection technology is one of the modern core military technologies, which has the advantages of long detection distance, strong anti-interference ability, and can work around the clock. With the development and maturity of infrared imaging technology, its application in civilian fields is becoming more and more extensive. [0003] According to the working principle, infrared detectors can be divided into two categories: quantum type and thermal type. Quantum-type infrared detectors have high sensitivity, generally require refrigeration, and are expensive. Thermal infrared detectors are slightly less sensitive, do not require refrigeration, and are more cost-effective. This kind of uncooled infrared detector can be divided into two categories: electrical readout and op...

Claims

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Application Information

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IPC IPC(8): H01L21/50H01L23/31
Inventor 冯飞张云胜王跃林
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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