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Dual-mode self switching radiation hardening clock generation circuit based on phase-locked loops

A clock generation circuit, anti-radiation hardening technology, applied in the direction of automatic power control, electrical components, etc., can solve the problems of error rate reduction, large power consumption, area, consumption, etc., to achieve low power consumption, convenient implementation, and small area Effect

Active Publication Date: 2016-05-25
BEIJING MXTRONICS CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since there are many sensitive nodes inside the phase-locked loop, only the nodes with greater influence can be reinforced and designed, which only reinforces the SET effect from a high probability and reduces the error rate; the other is to systematically Level reinforcement, that is, three-mode redundancy reinforcement, because this method copies the phase-locked loop three times, it consumes a lot of power consumption and area

Method used

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  • Dual-mode self switching radiation hardening clock generation circuit based on phase-locked loops
  • Dual-mode self switching radiation hardening clock generation circuit based on phase-locked loops
  • Dual-mode self switching radiation hardening clock generation circuit based on phase-locked loops

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Embodiment Construction

[0020] Such as figure 1 As shown, the dual-mode self-switching radiation-resistant hardened clock generation circuit based on the phase-locked loop is composed of the main phase-locked loop 1 and the auxiliary phase-locked loop 2, the main delay unit 3 and the auxiliary delay unit 5, and the error detection unit 4 Composed of a clock selection unit 6; the main road phase-locked loop 1 and the auxiliary road phase-locked loop 2 are charge pump phase-locked loops that have not been hardened against radiation, and provide clock signal output respectively; the main road delay unit 3 pairs the main road phase-locked loop The clock signal PLL-CLK1 output by 1 is delayed to obtain the delayed output CK1 of the main road phase-locked loop clock signal; the auxiliary road delay unit 5 delays the clock signal PLL-CLK1 output by the auxiliary road phase-locked loop 2 to obtain the auxiliary road phase-locked The delayed output CK2 of the ring clock signal; the error detection unit 4 dete...

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Abstract

The invention provides a dual-mode self switching radiation hardening clock generation circuit based on phase-locked loops, which is mainly composed of two independent phase-locked loops, a delay unit, an error detection unit and a clock selection unit. The two independent phase-locked loops are charge pump phase-locked loops not subjected to radiation hardening, and used for providing corresponding clock output; the delay unit realizes the delay of output signals of the phase-locked loops; the error detection unit is used for detecting whether two output signals of a phase frequency detector in a main phase-locked loop are right and outputting corresponding indication signals; and the clock selection unit performs selective output on the delayed output of the two phase-locked loops as the final output. The dual-mode self switching radiation hardening clock generation circuit based on the phase-locked loops provided by the invention can eliminate interference of a single event effect in a radiation environment on a circuit working state to a great extent, ensure the stability of the phase-locked loops as clock signals, improve the reliability of the system, and has the advantages of being easy in implementation, small in area, low in power consumption and so on.

Description

technical field [0001] The invention relates to a clock generation circuit based on a phase-locked loop, in particular to a dual-mode self-switching radiation-resistant hardened clock generation circuit, which can effectively eliminate and suppress single-event transient (SET) effects. Background technique [0002] With the continuous shrinking of the feature size of integrated circuits, the single event transient (SET) effect caused by the impact of high-energy particles in the space radiation environment cannot be ignored. A stable high-speed system clock is the key to ensure the high-speed and stable operation of the system. The single-event transient (SET) effect can not only make the output clock signal of the phase-locked loop wrong, but the wrong clock will also cause data transmission errors and even paralyze the entire system. [0003] In view of the seriousness of the single event effect, it is very necessary to use a phase-locked loop with a radiation-hardened des...

Claims

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Application Information

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IPC IPC(8): H03L7/07H03L7/085H03L7/18
CPCH03L7/07H03L7/085H03L7/18
Inventor 赵元富岳素格王亮韩兵孙永姝周孟龙李东强
Owner BEIJING MXTRONICS CORP
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