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A shield grid oxide layer of a shield grid-deep groove MOSFET and a formation method thereof

A technology of shielding gate and oxide layer, applied in electrical components, circuits, semiconductor devices, etc., can solve the problems of high cost and low output, and achieve the effect of increasing production capacity, reducing production cost, and simplifying process conditions

Active Publication Date: 2016-06-22
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The final morphology is better, such as Figure 5B As shown, it is commonly used to deposit a 9000 angstrom oxide layer 8 by SACVD at present. This process is expensive and requires special conditions, so the yield is very low.

Method used

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  • A shield grid oxide layer of a shield grid-deep groove MOSFET and a formation method thereof
  • A shield grid oxide layer of a shield grid-deep groove MOSFET and a formation method thereof
  • A shield grid oxide layer of a shield grid-deep groove MOSFET and a formation method thereof

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Embodiment Construction

[0045] The present invention will be further described in detail below with reference to the drawings and specific embodiments.

[0046] The shielded gate oxide layer of the shielded gate-deep trench MOSFET provided by the present invention, such as Figure 6B As shown, it includes a first oxide layer (ie, the gate oxide layer 6 of the MOSFET), a nitride layer 7 and a second oxide layer 8. The first oxide layer is formed on the bottom surface and the sidewall surface of the trench. The oxide layer 7 is formed on the surface of the first oxide layer, the second oxide layer 8 is formed on the surface of the nitride layer 7, and the second oxide layer 8 is formed by depositing and thermally oxidizing polysilicon. In the present invention, the ONO layer formed by the superposition of the first oxide layer (ie the gate oxide layer 6), the nitride layer 7 and the second oxide layer 8 serves as the bottom surface and side of the shielding gate and the trench in the MOSFET. Shielding oxi...

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Abstract

The invention discloses a shield grid oxide layer of a shield grid-deep groove MOSFET and a formation method thereof. The method comprises the following steps: 1, grooves are formed in an epitaxial layer through etching; first oxide layers form on the bottom surfaces and the sidewall surfaces of the grooves through adoption thermooxidizing growth technology; 2, nitridation layers form on surfaces of the first oxide layers; 3, deposited polysilicon layers form on the surfaces of the nitridation layers through adoption of polysilicon deposition technology; 4, thermooxidizing is carried out, and the deposited polysilicon layers are all oxidized to form second oxides; and the first oxide layers, the nitridation layers and the second oxide layers together form a shield grid oxide layer. According to the invention, an existing mode of directly depositing oxide layers on nitridation layers through SACVD is replaced by a mode of depositing polysilicon on the nitridation layers and carrying out thermooxidizing on the polysilicon, so that the thickness of each shield grid oxide layer used for isolation between shield grids and the groove sidewalls and between the shield grids and the groove bottom portions is ensured; technology conditions are simplified; the production cost is reduced; and the production power is raised.

Description

Technical field [0001] The present invention relates to the field of semiconductor integrated circuit manufacturing technology, in particular to a shielded gate oxide layer located on the sidewall of the trench in a shielded gate-deep trench MOSFET, and also relates to a shielded gate-deep trench MOSFET located on the sidewall of the trench The formation method of the shielding gate oxide layer. Background technique [0002] Such as figure 1 As shown, it is a schematic structural diagram of an existing trench gate MOSFET with a shield gate (ShieldGate Trench, SGT) structure. Taking an N-type device as an example, the unit structure of the trench gate MOSFET with a shield gate structure includes : [0003] The N-type silicon epitaxial layer 101 is formed on a silicon substrate, the silicon substrate is heavily doped and has a drain formed on the back side, and the silicon epitaxial layer 101 is lightly doped to form a drift region; [0004] The P well 102 is formed on the surface of...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/423H01L21/336H01L21/28
CPCH01L29/42364H01L29/66477H01L29/78H01L21/28H01L29/7813H01L29/407H01L29/66734
Inventor 陈正嵘
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP